From a review of the Second Edition 'If you are new to the field and want to know what "all this Verilog stuff is about," you've found the golden goose. The text here is straight forward, complete, and example rich -mega-multi-kudos to the author James Lee. Though not as detailed as the Verilog reference guides from Cadence, it likewise doesn't suffer from the excessive abstractness those make you wade through. This is a quick and easy read, and will serve as a desktop reference for as long as Verilog lives. Best testimonial: I'm buying my fourth and fifth copies tonight (I've loaned out/lost two of my others).' Zach Coombes, AMD
Author(s): James M. Lee
Edition: 2nd
Year: 1999
Language: English
Pages: 352
Preliminaries......Page 1
TABLE OF CONTENTS......Page 6
1 INTRODUCTION......Page 24
2 INTRODUCTION TO THE VERILOG LANGUAGE......Page 32
3 STRUCTURAL MODELING......Page 42
4 BEHAVIORAL MODELING......Page 56
5 OPERATORS......Page 94
6 WORKING WITH BEHAVIORAL MODELING......Page 110
7 USER-DEFINED PRIMITIVES......Page 156
8 PARAMETERIZED MODULES......Page 166
9 STATE MACHINES......Page 174
10 MODELING TIPS......Page 190
11 MODELING STYLE TRADE-OFFS......Page 222
12 TEST BENCHES AND TEST MANAGEMENT......Page 236
13 COMMON ERRORS......Page 260
14 DEBUGGING A DESIGN......Page 270
Appendix A GATE LEVEL DETAILS......Page 304
Appendix B EXAMPLE SUMMARY......Page 322
INDEX......Page 336
