This book captures the author’s 35+ years of learning & experience in the semiconductor chip industry to provide a proven roadmap for successful, new product introduction process, tailored specifically to the semiconductor industry. The content includes a simplified process flow, success metrics, execution guidelines, checklists & calculators. The presentation is based on a product engineering centric “NPI hub” and the author guides readers through the complete process of semiconductor new product introduction, ensuring a successful plan execution.
Author(s): Fariborz Barman
Series: Synthesis Lectures on Engineering, Science, and Technology
Publisher: Springer
Year: 2022
Language: English
Pages: 126
City: Cham
Foreword
Preface
Contents
About the Author
Abbreviations
List of Figures
List of Tables
1 Semiconductor Product Life Cycle, DFT and Budgeting
1.1 Life Cycle Chart and Hub of Influence Concept
1.2 Concept/Business Case/Test Chip(s)
1.2.1 Prepare a Budget for Key Items to Enable a Successful New Product Introduction
1.2.2 Failure Analysis Setup for $15,000
1.2.3 Outside Services
1.3 Product Definition Stage
1.3.1 PE DFT Features Requests
1.3.2 Critical DFT Features for ZDD421A
1.4 Product Development Stage
1.5 First Silicon, Product Validation, Product Qualification and Characterization Phases
1.6 Pilot Production Stage
1.7 High Volume Ramp Phase
1.8 Cost Reduction Phase
1.9 Sustaining Phase
1.10 Obsolescence Phase
1.11 Summary
2 Reliability Qualification
2.1 Qualification Standards Pyramid
2.2 Planning Qualification Activities
2.2.1 Level 1 Qualification
2.2.2 Helpful Hints
2.2.3 Level 2 Qualification
2.2.4 Assess Your Products’ Reliability Using Industry Standard Specifications
2.2.5 Electromigration
2.2.6 Negative Bias Temperature Instability Lifetime Prediction (NBTI)
2.2.7 Hot Carrier Injection Lifetime Prediction Model (HCI)
2.2.8 Gate Oxide Integrity Lifetime Prediction (GOI)
2.3 Assessing ZDD421A Reliability
2.4 Summary
3 Semiconductor Engineering Sample Phase and Product Characterization
3.1 Pre-First Silicon Activities
3.2 Pre-First Silicon Activities Checklist
3.3 First Silicon and Follow on Activities
3.4 Customer Sample Delivery Planning
3.5 Why Do Characterization?
3.6 New Product Introduction Pyramid
3.7 Basic Concept of Statistical Process Capability (Cpk)
3.8 Where Does Product Engineer Start All These Activities?
3.9 Characterization Test Program Considerations
3.10 Data Collection
3.11 Data Analysis
3.12 Data Presentation and Report Compilation
3.13 Summary
4 Planning and Delivering Semiconductor Process Skew Lots and Performing Failure Analysis
4.1 Skew Lot Planning and Execution
4.2 ZDD421A Yield Modeling and Correlation
4.3 Edge Effects and Yield Pitfalls
4.4 Automotive Product Considerations
4.4.1 Data Presentation Lessons Learned
4.4.2 Big Picture Goal of Failure Analysis
4.4.3 Reliability Qualification Failures
4.4.4 Failures During Engineering Validation and Other Internal Group Evaluations
4.4.5 Wafer Sort, Final Test or EQA Failures
4.4.6 Customer Manufacturing Site Failures Isolated to Your Product
4.4.7 Failures from the “Field” Isolated to Your Product
4.4.8 Analysis Techniques, Methods and Considerations
4.4.9 Basic Power Up Emissions Test
4.4.10 FIB (Focused Ion Beam)
4.4.11 Layer-By-Layer Removal and Inspection
4.4.12 Real Life Examples
4.5 Summary
5 Production Silicon Introduction, Volume Ramp and Cost Reduction Phase
5.1 Get Ready to Distribute Units to Various Groups
5.2 Have Major Yield Issues Discovered on ES Silicon Been Addressed Adequately?
5.3 Have Functional, Performance and Reliability Issues Been Adequately Addressed?
5.4 Are There Any Reliability Test(s) that Need to Be Re-Done Due to Failures in ES Silicon?
5.5 Test Program Content and Flow Must Be Finalized
5.6 BOM, Mfg. Flow and Supply Chain Must Be Finalized
5.7 Are Subcontractors, Suppliers and Supply Chain Ready for Production Silicon Introduction?
5.8 Production Revision Lots Tracking, Yield Analysis and Any Process Targeting
5.9 Case Study
5.10 Assess the Quality and Reliability Achieved Using the Proposed Production Manufacturing Flow
5.11 Final Manufacturing Flow Must Be Determined During This Phase
5.12 Publish Final Characterization Report
5.13 Publish Final Reliability Qualification Report
5.14 Test Cost Reduction
5.15 Test Time Reduction
5.16 Test Step Elimination
5.17 Manufacturing Step Elimination
5.18 System Level Test Elimination
5.19 2nd Source Fab and Assembly Bring Up Is Close to Bring Up and Volume Ramp
5.20 Aggressive Yield Improvements Are Your Key to Cost Reduction
5.21 Summary
