Two-stage single-phase converters, including two-stage single-phase dc-ac inverters and two-stage single-phase PFC converters, are interfacing power converters between dc and ac voltage/current sources, which have been widely applied for dc-ac and ac-dc power conversion. For the two-stage single-phase converter, the ac-side power pulsates at twice the ac voltage frequency, resulting in second harmonic current (SHC) which might flow into the dc-dc converter, the dc voltage source, and dc load. This book clarifies the generation, propagation, and side-effects of this SHC and proposes the SHC reduction control schemes for the dc-dc converter, with different topologies and/or different operating modes, in the single-phase converter. On this basis, the second harmonic current compensator (SHCC) is proposed to compensate the SHC, significantly reducing the dc bus capacitance. In doing so, the electrolytic capacitors, with short lifetimes, are removed from the two-stage single-phase converter, leading to extended system lifetime and enhanced system stability. For having flawless SHC compensation performance, the port-current control schemes are proposed for the SHCC. Additionally, the stability analysis is carried out for the two-stage single-phase converter with the addition of SHCC. This book is a monograph combining theoretical analysis and engineering design, which could not only be a reference book for master students, Ph.D. students, and teachers majoring in power electronics but also be a handbook for the electrical engineers working on the research and development of LED drivers, EV on-board chargers, railway auxiliary power supplies, aviation power supplies, renewable energy generation systems, etc.
Author(s): Xinbo Ruan, Li Zhang, Xinze Huang, Fei Liu, Guoping Zhu, Shiqi Kan
Series: CPSS Power Electronics Series
Publisher: Springer
Year: 2022
Language: English
Pages: 303
City: Singapore
Preface
Acknowledgements
Contents
About the Authors
Abbreviations
1 Introduction
1.1 Applications and Configurations of Two-Stage Single-Phase Converters
1.1.1 Applications of Single-Phase Converters
1.1.2 Configuration of the Single-Phase Converters
1.2 Generation and Propagation Mechanism of the Second Harmonic Current
1.3 Harm of the SHC
1.4 SHC Reduction Approaches
1.4.1 Passive-Components-Based SHC Reduction Approaches
1.4.2 Closed-Loop-Control-Based SHC Reduction Approaches
1.4.3 Power-Decoupling-Based SHC Reduction Approaches
1.5 Second Harmonic Current Compensator
1.5.1 Control Schemes of the SHCC
1.5.2 Stability of the Two-Stage Single-Phase Converter Adopting SHCC
1.6 Summary
References
2 Basic Approaches for Reducing Second Harmonic Current in Two-Stage Single-Phase Converters
2.1 Categories of DC-DC Converter in Two-Stage Single-Phase Converter
2.2 Small-Signal AC Equivalent Circuits for DC-DC Converter in Two-Stage Single-Phase Converter
2.3 Characteristics of DC-Bus Port-Impedance for DC-DC Converter in Two-Stage Single-Phase Converter
2.3.1 Derivation of DC-Bus Port-Impedance for BVCC in Two-Stage Single-Phase Inverter
2.3.2 Derivation of DC-Bus Port-Impedance for BCCC in Two-Stage Single-Phase Inverter
2.3.3 Derivation of DC-Bus Port-Impedance for BCCC in Two-Stage Single-Phase PFC Converter
2.3.4 Derivation of DC-Bus Port-Impedance for BVCC in Two-Stage Single-Phase PFC Converter
2.3.5 Discussion for Characteristics of DC-Bus Port-Impedance for BVCC and BCCC
2.4 Basic SHC Reduction Approaches
2.4.1 Approaches for Reducing SHC in BVCC
2.4.2 Approaches for Reducing SHC in BCCC
2.4.3 Second Harmonic Current Compensator Based SHC Reduction Approach
2.5 Summary
References
3 Second Harmonic Current Reduction for Two-Stage Single-Phase Inverter with Buck-Derived Front-End Bus-Voltage-Controlled Converter
3.1 Mechanism of SHC Propagation in Buck-Derived Front-End BVCC and DC Voltage Source
3.2 Methodology of Reducing SHC in Buck-Derived BVCC
3.2.1 Introduction of Series Impedance and Parallel Impedance
3.2.2 Design of Series Impedance and Parallel Impedance
3.3 Derivation of SHC Reduction Control Schemes for Buck-Derived BVCC
3.3.1 Band-Pass Filter Incorporated Inductor Current Feedback Scheme (BPF-ICFS)
3.3.2 Virtual Resistor Based Control Scheme (VRS)
3.3.3 Notch Filter Cascading Voltage Regulator Scheme (NF-VRS)
3.3.4 Band-Pass Filter Incorporated Capacitor Voltage Feedback Scheme (BPF-CVFS)
3.3.5 Notch Filter Inserted Load Current Feed-Forward Scheme (NF-LCFFS)
3.3.6 Notch Filter Cascading Voltage Regulator Plus Load Current Feed-Forward Scheme (NF-VR + LCFFS)
3.3.7 Brief Comparison of Different Control Schemes
3.4 Closed-Loop Parameters Design Approach for Different Control Schemes
3.4.1 Closed-Loop Parameters Design Approach for VRS and NF-LCFFS
3.4.2 Closed-Loop Parameters Design Approach for BPF-ICFS
3.4.3 Closed-Loop Parameters Design Approach for NF-VR+LCFFS
3.5 Comparison of DC-Bus Port-Impedance for Buck-Derived BVCC with Different SHC Reduction Control Schemes
3.6 Experimental Results
3.7 Summary
References
4 Second Harmonic Current Reduction for Two-Stage Single-Phase Inverter with Boost-Derived Front-End Bus-Voltage-Controlled Converter
4.1 Mechanism of SHC Propagation in Boost-Derived Front-End BVCC and DC Voltage Source
4.2 Methodology of Reducing SHC in Boost-Derived BVCC
4.2.1 Introduction of Series Impedance and Parallel Impedance
4.2.2 Design of Series Impedance and Parallel Impedance
4.3 Derivation of SHC Reduction Control Schemes for Boost-Derived BVCC
4.3.1 Band-Pass Filter Incorporated Diode/Inductor Current Feedback Scheme (BPF-DCFS/BPF-ICFS)
4.3.2 Virtual Resistor Based Control Scheme (VRS)
4.3.3 Notch Filter Inserted Load Current Feed-Forward Scheme (NF-LCFFS)
4.3.4 Notch Filter Cascading Voltage Regulator Plus Load Current Feed-Forward Scheme (NF-VR+LCFFS)
4.3.5 Brief Comparison of Different Control Schemes
4.4 Closed-Loop Parameters Design Approach for Different Control Schemes
4.4.1 Closed-Loop Parameters Design Approach for VRS and NF-LCFFS
4.4.2 Closed-Loop Parameters Design Approach for BPF-ICFS
4.4.3 Closed-Loop Parameters Design Approach for NF-VR+LCFFS
4.5 Comparison of DC-Bus Port-Impedance for Boost-Derived BVCC with Different SHC Reduction Control Schemes
4.6 Experimental Results
4.7 Summary
References
5 Second Harmonic Current Reduction for Two-Stage DC-AC Inverter with DCX-LLC Resonant Converter in the Front-End DC-DC Converter
5.1 Propagation Mechanism of the SHC
5.2 Small-Signal Model of the Preregulator + LLC Converter
5.2.1 Brief Review of the Small-Signal Model for LLC Resonant Converter
5.2.2 Simplification of the Small-Signal Model for DCX-LLC Resonant Converter
5.2.3 Small-Signal Model of the Preregulator + LLC Converter
5.3 Basic Ideas for Reducing the SHC in the Front-End Preregulator + LLC Converter
5.3.1 Determination of Cb1 and Cb2 for Reducing the SHC
5.3.2 Control Ideas for Reducing the SHC
5.4 Control Schemes for Reducing the SHC in the Front-End Preregulator + LLC Converter
5.4.1 Notch Filter Inserted into Voltage Loop Scheme (NF-VLS)
5.4.2 Virtual Impedance Introduced into Output Rectifier Scheme (VI-ORS)
5.4.3 Notch Filter Inserted into Voltage Loop Plus Virtual Impedance Introduced into Output Rectifier Scheme (NF-VL + VI-ORS)
5.5 Experimental Verifications
5.5.1 Implementation of the Two-Stage DC-AC Inverter
5.5.2 Design Considerations of the VI-ORS
5.5.3 Comparison of the Control Schemes
5.5.4 Experimental Results
5.6 Summary
References
6 Second Harmonic Current Reduction for Two-Stage Single-Phase Inverter with Front-End Bus-Current Controlled Converter
6.1 Small-Signal Model of the Front-End Boost Converter
6.2 Approaches of Reducing the SHC
6.2.1 SHC Reduction Approaches in the Front-End Boost Converter
6.2.2 SHC Reduction Approaches in the PV Panel
6.3 Control Schemes for Reducing SHC
6.3.1 Active Damping for Resonant Peak
6.3.2 Step-By-Step Design Method of the Closed-Loop Parameters and the Active-Damping Resistor
6.3.3 Proportional-Integral-Resonant Regulator Plus Active-Damping Scheme
6.4 Design Example
6.4.1 Closed-Loop Parameters Design
6.4.2 Resonant Regulator Design
6.5 Experimental Results
6.6 Summary
References
7 Second Harmonic Current Reduction for DC-DC Converter in Two-Stage PFC Converters
7.1 Propagation Mechanism of the SHC
7.2 Second Harmonic Current Reduction Schemes for DC-DC Stage
7.2.1 SHC Reduction Schemes for the DC-DC Stage Operated as a BCCC
7.2.2 SHC Reduction Schemes for the DC-DC Stage Operated as a BVCC
7.3 Derivation of the Control Schemes for Reducing the SHC in DC-DC Stage
7.3.1 Band-Pass Filter Based Input/Output Current Feedback Scheme
7.3.2 Notch Filter Based Input Current Feed-Forward Scheme
7.3.3 Notch Filter Based Voltage Regulator Plus Input Current Feed-Forward Scheme
7.4 Design of the Closed-Loop Parameters for DC-DC Stage
7.4.1 Derivation of the DC Bus Voltage Loop Gain
7.4.2 Design of the Closed-Loop Parameters of the NF-ICFFS
7.4.3 Design of the Closed-Loop Parameters of the BPF-OCFS
7.4.4 Design of the Closed-Loop Parameters of the NF-VR + ICFFS
7.5 Experiment Results
7.5.1 The PSFB Converter Operates as a BCCC
7.5.2 The PSFB Converter Operates as a BVCC
7.6 Summary
References
8 Control Schemes for Reducing Second Harmonic Current in AC-DC-AC Converter System
8.1 Generation and Propagation Mechanism of the SHC
8.1.1 Generation Mechanism of the SHC
8.1.2 Propagation Mechanism of the SHC
8.2 Basic Ideas for Reducing the SHC in the DC-DC Converter
8.2.1 Basic Ideas for Reducing the SHC When DC-DC Converter Controls Vbus2
8.2.2 Basic Ideas for Reducing the SHC When DC-DC Converter Controls Vbus1
8.3 Control Scheme for Reducing the SHC in DC-DC Converter
8.3.1 Virtual Impedance Based Scheme (VIS)
8.3.2 Design Guideline of the Virtual Impedance
8.4 Experimental Verifications
8.4.1 Implementation of the AC-DC-AC Converter System
8.4.2 Parameters Design of the Virtual Impedance
8.4.3 Experimental Results
8.5 Summary
References
9 A Current Reference Feedforward Scheme for the Second Harmonic Current Compensator
9.1 Operating Principle of Electrolytic Capacitor-Less SHCC
9.2 Dual Closed-Loop Control Scheme for the SHCC
9.3 Current Reference Feed-Forward Control Scheme for the SHCC
9.4 Simplified Current Reference Feed-Forward Control Scheme
9.5 Experimental Results
9.6 Summary
References
10 One-Cycle Control for Electrolytic Capacitor-Less Second Harmonic Current Compensator
10.1 Basic Topologies for Electrolytic Capacitor-Less SHCC
10.2 One-Cycle Control Scheme for the SHCC
10.2.1 Fundamental Principle of Basic One-Cycle Control
10.2.2 Hybrid One-Cycle Control
10.2.3 One-Cycle Control with DC Bias
10.3 Experimental Results
10.4 Extension of the OCC with DC Bias to Other Bidirectional Converters
10.5 Summary
References
11 A Virtual-Impedance-Based Control Scheme for Modular Electrolytic Capacitor-Less Second Harmonic Current Compensator
11.1 Virtual-Impedance-Based Control Scheme for the SHCC
11.1.1 Introduction of the Basic Idea
11.1.2 The Characteristics of the Original Port-Impedance of the SHCC
11.1.3 Introduction of the Virtual Parallel Impedance
11.2 Form of the Virtual Parallel Impedance
11.3 Design of the Virtual Parallel Impedance
11.3.1 Bus-Side Port Impedances of the PFC Converter and PSFB Converter
11.3.2 Design of Cp
11.3.3 Design of rp and rd
11.3.4 Design of Closed-Loop Parameters
11.4 Experiment Results
11.5 Summary
References
12 Adaptive Storage Capacitor Voltage Control for Second Harmonic Current Compensator in Single-Phase Converters
12.1 Critical Quantitative Relationships in Electrolytic Capacitor-Less SHCC
12.2 Adaptive Storage Capacitor Voltage Control
12.2.1 Maximum Storage Capacitor Voltage Control for Buck-Type SHCC
12.2.2 Minimum Storage Capacitor Voltage Control for Boost-Type SHCC
12.3 Experimental Verifications
12.3.1 Maximum Storage Capacitor Voltage Control for Buck-Type SHCC
12.3.2 Minimum Storage Capacitor Voltage Control for Boost-Type SHCC
12.4 Summary
References
13 Stability Analysis of Two-Stage Single-Phase Converter System Adopting Electrolytic Capacitor-Less Second Harmonic Current Compensator
13.1 Classification of the Single-Phase Systems
13.2 Control and Bus-Port Impedance Characteristic of the SHCC
13.2.1 Control of the SHCC
13.2.2 Bus-Port Impedance of the SHCC
13.3 Effect of SHCC on System Stability
13.4 The Virtual Parallel Impedance for Improving the System Stability
13.5 Experiment Results
13.5.1 The AC–DC Stage is a BVCC
13.5.2 The AC–DC Stage is a BVCC
13.6 Summary
References
Index
