This book gathers together comprehensive information which test and process professionals will find invaluable. The techniques outlined will help ensure that test methods and data collected reflect actual device performance, rather than 'testing the tester' or being lost in the noise floor. This book addresses the fundamental issues underlying the semiconductor test discipline. The test engineer must understand the basic principles of semiconductor fabrication and process and have an in-depth knowledge of circuit functions, instrumentation and noise sources. Introduces a novel component-testing philosophy for semiconductor test, product and design engineers. Best new source of information for experienced semiconductor engineers as well as entry-level personnel. Eight chapters about semiconductor testing.
Author(s): Amir Afshar
Year: 1995
Language: English
Pages: 350
Front Cover......Page 1
Principles of Semiconductor Network Testing......Page 4
Copyright Page......Page 5
Contents......Page 8
Foreword......Page 12
Preface......Page 14
Introduction......Page 16
1.1 Semiconductor Materials......Page 18
1.2 Bipolar Transistors......Page 21
1.3 MOS Transistors......Page 30
References......Page 36
Introduction......Page 38
2.1 Designing Integrated Circuits......Page 39
2.2 Silicon Wafer Production......Page 40
2.3 Test Limits Guardbanding......Page 43
2.4 Wafer Test Hardware......Page 46
2.6 Final Test......Page 49
2.7 Quality Assurance (QA) Test......Page 50
References......Page 71
Introduction......Page 72
3.2 Shorts Test......Page 75
3.4 lcc Test......Page 76
3.5 Breakdown Voltage (VB) Test......Page 77
3.7 VOL Test (Low Level Output Voltage)......Page 78
3.9 lIH Test (High Level Input Current)......Page 79
3.10 IOZH Test (High Level Three-state Output Current)......Page 80
3.11 IOZL Test (Low Level Three-state Output Current)......Page 81
3.13 IOH (Saturation) Test (High Output Saturation Current)......Page 82
3.14 Voltage Hysteresis (VHYS) Test......Page 83
3.15 A Binary Search Algorithm......Page 85
3.16 AC Testing Description......Page 87
3.17 Propagation Delay Test (tPLH, tPHL, tPHZ, tPLZ)......Page 88
3.18 Output Pulse Width (tw) Test......Page 89
3.21 Hold Time Test (tH)......Page 90
3.23 Noise in Digital Circuits......Page 91
References......Page 97
Introduction......Page 98
4.1 Grounding......Page 100
4.2 General Guidelines for Grounding......Page 102
4.3 Resistor Noise......Page 103
4.4 Inductor Noise......Page 104
4.5 Capacitor Noise......Page 105
4.7 Shot Noise......Page 107
4.9 Popcorn (Burst) Noise......Page 108
4.10 Contact Noise......Page 109
4.12 Decoupling......Page 110
4.13 Facts about Power Supplies......Page 111
4.14 Suppressing Noise Created by Capacitive Load......Page 113
References......Page 114
Introduction......Page 116
5.1 Ideal Behavior of an Op Amp......Page 118
5.3 Basic Op Amp Internal Structure......Page 119
5.4 Common Mode Signal......Page 123
5.6 Single-ended Output......Page 125
5.8 Slew Rate (SR)......Page 126
5.9 Op Amp DC Measurement (Nulling Circuit)......Page 129
5..10 VOS Test (Input Offset Voltage)......Page 130
5.11 VOS Test Using Nulling Circuit......Page 131
5.12 lOS Test (Input Offset Current)......Page 132
5.13 VON Test (Negative Output Voltage Swing)......Page 133
5.15 CMRR Test (Common Mode Rejection Ratio)......Page 134
5.17 AV (Gain) Test......Page 136
5.18 PSRR Test (Power Supply Rejection Ratio)......Page 137
5.20 Oscillation......Page 138
5.21 Noise in Different Types of Operational Amplifiers......Page 140
References......Page 143
Introduction......Page 146
6.2 Definition of Terms......Page 148
6.3 Operation of a 4-Bit Converter......Page 157
6.4 Conversion Operation......Page 158
6.5 A/D and D/A Test Description......Page 160
6.6 IIH Test (Logical "1" Input Current)......Page 173
6.8 IOZL Test (Three-state Low Level Output Leakage)......Page 174
6.10 VOH Test (Logic "1" Output Voltage)......Page 175
6.12 ICC/IDD Test (Power Supply Current)......Page 176
6.14 lIN(1) Test (Analog High on Channel Input Current) while Clock is On......Page 177
6.17 IIN(0) Test (Analog Low on Channel Input Current) while Clock is Off......Page 178
6.18 Functional Test......Page 179
6.20 RES Test (Resolution Test)......Page 180
6.21 Nonlinearity Test......Page 181
6.23 Tws Test (Minimum Start Pulse Width)......Page 182
6.26 TD Test (Analog MUX Delay Time from ALE)......Page 183
6.28 TH1, TH0 Test (OE Control to High-Z)......Page 184
References......Page 185
Introduction......Page 188
7.1 Anti-aliasing Filter......Page 189
7.4 Function Generator and Signal Properties......Page 190
7.5 Fourier Series and Fourier Transforms......Page 192
7.6 Signal Conversion......Page 195
7.7 Sampling Rate......Page 198
7.8 Errors......Page 200
References......Page 202
Introduction......Page 204
8.1 Frame Concept......Page 205
8.2 Companding Rules in Communication......Page 207
8.3 C-Message and P-Message......Page 209
8.4 Unit of Noise Power......Page 210
8.7 Basic Modulations in Telecommunication......Page 213
8.9 Introduction to CODEC Testing......Page 214
8.10 Single-tone CODEC Testing (Analog Method)......Page 215
8.11 Multitone CODEC Testing......Page 219
8.14 CODEC Dynamic Tests--Encoder Section......Page 220
8.15 CODEC Dynamic Tests--Decoder Section......Page 222
References......Page 223
Index......Page 224
