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Power Distribution Network Design for VLSI

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The common task in a VLSI power network design is to provide enough power lines across a chip to reduce voltage drops. This is a main challenge in high-performance chips as these drops create noise, reducing speed and clarity. This book provides detailed information on the power distribution network design in integrated circuit chips.

Author(s): Qing K. Zhu
Edition: 1
Publisher: Wiley-Interscience
Year: 2004

Language: English
Pages: 213