PIC16F1847 Microcontroller-Based Programmable Logic Controller: Hardware and Basic Concepts

This document was uploaded by one of our users. The uploader already confirmed that they had the permission to publish it. If you are author/publisher or own the copyright of this documents, please report to us by using this DMCA report form.

Simply click on the Download Book button.

Yes, Book downloads on Ebookily are 100% Free.

Sometimes the book is free on Amazon As well, so go ahead and hit "Search on Amazon"

Programmable logic controllers (PLCs) have been used extensively and are offered in terms of functions, program memories, and the number of inputs/outputs (I/Os), ranging from a few to thousands. With a focus on how to design and implement a PLC, this volume explains hardware and associated basic concepts of PLC. Authors have used PIC16F1847 microcontroller with: 8192 words of Flash program memory, 1024 bytes of SRAM data memory, 256 bytes of EEPROM data memory, the maximum operating speed of 32 MHz, 16-level deep hardware stack, an enhanced instruction set consisting of 49 single-word instructions. Flowcharts are provided to help the understanding of macros (instructions). Aimed at researchers and graduate students in electrical engineering, power electronics, robotics and automation, sensors, this book:

Explains how to design and use a PIC16F1847 microcontroller-based PLC.

Provides easy to use software structures written by using the PIC Assembly programming language.

Describes a PLC from a designer's perspective.

Explains the basic hardware and basic software structures of the PIC16F1847 based PLC.

Focuses on concepts like Contact and Relay Based Macros, Flip-Flop Macros, Timer Macros, Counter Macros and Comparison Macros.

Author(s): Murat Uzam
Publisher: CRC Press
Year: 2020

Language: English
Pages: 520
City: Boca Raton

Cover
Half Title
Title Page
Copyright Page
Dedication
Table of Contents
Prologue
Preface
About the Author
Background and Use of the Book
Chapter 1 Hardware of the PIC16F1847-Based PLC
Chapter 2 Basic Software
Introduction
2.1 Definition and Allocation of Variables
2.2 Contents of the File “PICPLC​_PIC16F1847​_memory​​.inc”
2.3 Contents of the File “PICPLC​_PIC16F1847​_main​​.asm”
2.4 Contents of the File “PICPLC​_PIC16F1847​_user​_Bsc​​.inc”
2.5 Contents of the File “PICPLC​_PIC16F1847​_subr​​.inc”
2.6 Contents of the File “PICPLC​_PIC16F1847​_macros​_Bsc​​.inc”
2.6.1 Macro “initialize”
2.6.2 Macro “isr”
2.6.3 Elimination of Contact Bouncing Problem in the pic16f1847-Based plc
2.6.3.1 Contact Bouncing Problem
2.6.3.2 Understanding a Generic Single I/O Contact Debouncer
2.6.3.3 Debouncer Macro “dbncrN”
2.6.4 Macro “Get_inputs”
2.6.5 Low-Pass Digital Filter Macro “Lpf_progs”
2.6.6 Macro “Send_outputs”
2.7 Example Programs
2.7.1 Example 2.1
2.7.2 Example 2.2
2.7.3 Example 2.3
2.7.4 Example 2.4
2.7.5 Example 2.5
2.7.6 Example 2.6
Reference
Chapter 3 Contact and Relay-Based Macros
Introduction
3.1 Macro “ld” (load)
3.2 Macro “ld_not” (load_not)
3.3 Macro “not”
3.4 Macro “or”
3.5 Macro “or_not”
3.6 Macro “nor”
3.7 Macro “and”
3.8 Macro “and_not”
3.9 Macro “nand”
3.10 Macro “xor”
3.11 Macro “xor_not”
3.12 Macro “xnor”
3.13 Macro “out”
3.14 Macro “out_not”
3.15 Macro “mid_out” (Midline Output)
3.16 Macro “mid_out_not” (Inverted Midline Output)
3.17 Macro “in_out”
3.18 Macro “inv_out”
3.19 Macro “_set”
3.20 Macro “_reset”
3.21 Macro “SR” (Set–Reset)
3.22 Macro “RS” (Reset–Set)
3.23 Macro “r_edge” (Rising Edge Detector)
3.24 Macro “f_edge” (Falling Edge Detector)
3.25 Macro “r_toggle” (Output Toggle with Rising Edge Detector)
3.26 Macro “f_toggle” (Output Toggle with Falling Edge Detector)
3.27 Macro “adrs_re” (Address Rising Edge Detector)
3.28 Macro “adrs_fe” (Address Falling Edge Detector)
3.29 Macro “setBF” (Set Bit Field)
3.30 Macro “resetBF” (Reset Bit Field)
3.31 Examples for Contact and Relay-Based Macros
3.31.1 Example 3.1
3.31.2 Example 3.2
3.31.3 Example 3.3
3.31.4 Example 3.4
3.31.5 Example 3.5
3.31.6 Example 3.6
3.31.7 Example 3.7
3.31.8 Example 3.8
Chapter 4 Flip-Flop Macros
Introduction
4.1 Macro “latch1” (D Latch with Active High Enable)
4.2 Macro “latch0” (D Latch with Active Low Enable)
4.3 Macro “dff_r” (Rising Edge–Triggered D Flip-Flop)
4.4 Macro “dff_r_SR” (Rising Edge–Triggered D Flip-Flop with Active High Preset [S] and Clear [R] Inputs)
4.5 Macro “dff_f” (Falling Edge–Triggered D Flip-Flop)
4.6 Macro “dff_f_SR” (Falling Edge–Triggered D Flip-Flop with Active High Preset [S] and Clear [R] Inputs)
4.7 Macro “tff_r” (Rising Edge–Triggered T Flip-Flop)
4.8 Macro “tff_r_SR” (Rising Edge–Triggered T Flip-Flop with Active High Preset [S] and Clear [R] Inputs)
4.9 Macro “tff_f” (Falling Edge–Triggered T Flip-Flop)
4.10 Macro “tff_f_SR” (Falling Edge–Triggered T Flip-Flop with Active High Preset [S] and Clear [R] Inputs)
4.11 Macro “jkff_r” (Rising Edge–Triggered JK Flip-Flop)
4.12 Macro “jkff_r_SR” (Rising Edge–Triggered JK Flip-Flop with Active High Preset [S] and Clear [R] Inputs)
4.13 Macro “jkff_f” (Falling Edge–Triggered JK Flip-Flop)
4.14 Macro “jkff_f_SR” (Falling Edge–Triggered JK Flip-Flop with Active High Preset [S] and Clear [R] Inputs)
4.15 Examples for Flip-Flop Macros
4.15.1 Example 4.1
4.15.2 Example 4.2
4.15.3 Example 4.3
4.15.4 Example 4.4
4.15.5 Example 4.5: 4-Bit Asynchronous Up Counter
4.15.6 Example 4.6: 4-Bit Asynchronous Down Counter
4.15.7 Example 4.7: Asynchronous Decade Counter
4.15.8 Example 4.8: 4-Bit Asynchronous Up/Down Counter
4.15.9 Example 4.9: Synchronous Decade Counter
4.15.10 Example 4.10: 4-Bit Synchronous Up/Down Counter
4.15.11 Example 4.11: 4-Bit Serial-in, Parallel-out Shift Right Register
4.15.12 Example 4.12: 4-Bit Serial-in, Serial-out Shift Right Register
4.15.13 Example 4.13: 4-Bit Serial-In, Parallel-Out Shift Right or Shift Left Register
4.15.14 Example 4.14: 4-Bit Parallel-in, Serial-out Shift Right Register
4.15.15 Example 4.15: 4-Bit Parallel-in, Parallel-out Register
4.15.16 Example 4.16: 74164 8-Bit Serial-in, Parallel-out Shift Register
4.15.17 Example 4.17: 74165 8-Bit Parallel-in, Serial-out Shift Register
4.15.18 Example 4.18: 74194 4-Bit Bidirectional Universal Shift Register
4.15.19 Example 4.19: 74595 8-Bit Serial-in, Serial- or Parallel-out Shift Register
4.15.20 Example 4.20: 4-Bit Johnson Counter
4.15.21 Example 4.21: 8-Bit Ring Counter
Chapter 5 Timer Macros
Introduction
5.1 On-Delay Timer (TON)
5.2 Macro “TON_8” (8-Bit On-Delay Timer)
5.3 Macro “TON_16” (16-Bit On-Delay Timer)
5.4 Retentive On-Delay Timer (RTO)
5.5 Macro “RTO_8” (8-Bit Retentive On-Delay Timer)
5.6 Macro “RTO_16” (16-Bit Retentive On-Delay Timer)
5.7 Off-Delay Timer (TOF)
5.8 Macro “TOF_8” (8-Bit Off-Delay Timer)
5.9 Macro “TOF_16” (16-Bit Off-Delay Timer)
5.10 Pulse Timer (TP)
5.11 Macro “TP_8” (8-Bit Pulse Timer)
5.12 Macro “TP_16” (16-Bit Pulse Timer)
5.13 Extended Pulse Timer (TEP)
5.14 Macro “TEP_8” (8-Bit Extended Pulse Timer)
5.15 Macro “TEP_16” (16-Bit Extended Pulse Timer)
5.16 Oscillator Timer (TOS)
5.17 Macro “TOS_8” (8-Bit Oscillator Timer)
5.18 Macro “TOS_16” (16-Bit Oscillator Timer)
5.19 Examples for Timer Macros
5.19.1 Example 5.1
5.19.2 Example 5.2
5.19.3 Example 5.3
5.19.4 Example 5.4
5.19.5 Example 5.5
5.19.6 Example 5.6
Chapter 6 Counter Macros
Introduction
6.1 Up Counter (CTU)
6.2 Macro “CTU_8” (8 Bit Up Counter)
6.3 Macro “CTU_16” (16 Bit Up Counter)
6.4 Down Counter (CTD)
6.5 Macro “CTD_8” (8 Bit Down Counter)
6.6 Macro “CTD_16” (16 Bit Down Counter)
6.7 Up/Down Counter (CTUD)
6.8 Macro “CTUD_8” (8 Bit Up/Down Counter)
6.9 Macro “CTUD_16” (16 Bit Up/Down Counter)
6.10 Generalized Up/Down Counter (GCTUD)
6.11 Macro “GCTUD_8” (Generalized 8 Bit Up/Down Counter)
6.12 Macro “GCTUD_16” (Generalized 16 Bit Up/Down Counter)
6.13 Examples for Counter Macros
6.13.1 Example 6.1
6.13.2 Example 6.2
6.13.3 Example 6.3
6.13.4 Example 6.4
6.13.5 Example 6.5
6.13.6 Example 6.6
About the Downloadable Files for Hardware and Basic Concepts
Index