Parallel Computers 2: Architecture, Programming and Algorithms

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Since the publication of the first edition, parallel computing technology has gained considerable momentum. A large proportion of this has come from the improvement in VLSI techniques, offering one to two orders of magnitude more devices than previously possible. A second contributing factor in the fast development of the subject is commercialization. The supercomputer is no longer restricted to a few well-established research institutions and large companies. A new computer breed combining the architectural advantages of the supercomputer with the advance of VLSI technology is now available at very attractive prices. A pioneering device in this development is the transputer, a VLSI processor specifically designed to operate in large concurrent systems.

Parallel Computers 2: Architecture, Programming and Algorithms reflects the shift in emphasis of parallel computing and tracks the development of supercomputers in the years since the first edition was published. It looks at large-scale parallelism as found in transputer ensembles. This extensively rewritten second edition includes major new sections on the transputer and the OCCAM language. The book contains specific information on the various types of machines available, details of computer architecture and technologies, and descriptions of programming languages and algorithms. Aimed at an advanced undergraduate and postgraduate level, this handbook is also useful for research workers, machine designers, and programmers concerned with parallel computers. In addition, it will serve as a guide for potential parallel computer users, especially in disciplines where large amounts of computer time are regularly used.

Author(s): Roger W. Hockney; C.R. Jesshope
Edition: 2
Publisher: CRC Press
Year: 2019

Language: English
Pages: xvi+625

Cover
Half Title
Title Page
Copyright Page
Dedication
Contents
PREFACE
1 INTRODUCTION
1.1 History of parallelism and supercomputing
1.2 Classification of designs
1.3 Characterisation of performance
2 PIPELINED COMPUTERS
2.1 Selection and comparison
2.2 The CRAY X-MP and CRAY-2
2.3 The CDC CYBER 205 and ETA[sup(10)]
2.4 Japanese vector computers: Fujitsu, Hitachi, NEC
2.5 The FPS AP-120B, FPS164 (M140, M30), 264 (M60), 164/MAX (M145)
3 MULTIPROCESSORS AND PROCESSOR ARRAYS
3.1 The limitations of pipelining
3.2 The alternative of replication
3.3 Switching networks
3.4 An historical perspective: ICL DAP, BSP, HEP
3.5 Replication—a future with VLSI: AMT DAP, RPA, Transputer
4 PARALLEL LANGUAGES
4.1 Introduction
4.2 Implicit parallelism and vectorisation
4.3 Structure parallelism: DAP FORTRAN, FORTRAN 8X, CMLISP
4.4 Process parallelism: OCCAM
4.5 Techniques for exploiting parallelism
5 PARALLEL ALGORITHMS
5.1 General principles
5.2 Recurrences
5.3 Matrix multiplication
5.4 Tridiagonal systems
5.5 Transforms
5.6 Partial differential equations
6 TECHNOLOGY AND THE FUTURE
6.1 Characterisation
6.2 Bipolar technologies (TTL , ECL, I[sup(2)]L)
6.3 MOS technologies (NMOS and CMOS)
6.4 Scaling technologies
6.5 The problems with scaling
6.6 System partitioning
6.7 Wafer-scale integration
6.8 The last word
APPENDIX
REFERENCES
INDEX