The primary aim of this book is to discuss various aspects of nanoscale device design and their applications including transport mechanism, modeling, and circuit applications.
Provides a platform for modeling and analysis of state-of-the-art devices in nanoscale regime, reviews issues related to optimizing the sub-nanometer device performance and addresses simulation aspect and/or fabrication process of devices.
Also, includes design problems at the end of each chapter.
Author(s): Brajesh Kumar Kaushik
Publisher: CRC
Year: 2019
Language: English
Pages: 432
Section I: Nanoscale Transistors
1: Simulation of Nanoscale Transistors from Quantum and Multiphysics Perspective
2: Variability in Nanoscale Technology and EdDC MOS Transistor
3: Effect of Ground Plane and Strained Silicon on Nanoscale FET Devices
Section II: Novel MOSFET Structures
4: U-Shaped Gate Trench Metal Oxide Semiconductor Field Effect Transistor: Structures and Characteristics
5: Operational Characteristics of Vertically Diffused Metal Oxide Semiconductor Field Effect Transistor
6: Modeling of Double-Gate MOSFETs
Section III: Modeling of Tunnel FETs
7: TFETs for Analog Applications
8: Dual Metal–Double Gate Doping-Less TFET: Design and Investigations
Section IV: Graphene and Carbon Nanotube Transistors and Applications
9: Modeling of Graphene Plasmonic Terahertz Devices
10: Analysis of CNTFET for SRAM Cell Design
11: Design of Ternary Logic Circuits Using CNFETs
Section V: Modeling of Emerging Non-Silicon Transistors
12: Different Analytical Models for Organic Thin-Film Transistors: Overview and Outlook
13: A Fundamental Overview of High Electron Mobility Transistor and Its Applications
Section VI: Emerging Nonvolatile Memory Devices and Applications
14: Spintronic-Based Memory and Logic Devices
15: Fundamentals, Modeling, and Application of Magnetic Tunnel Junctions
16: RRAM Devices: Underlying Physics, SPICE Modeling, and Circuit Applications
17: Evaluation of Nanoscale Memristor Device for Analog and Digital Application
Index