Mixed-Signal Embedded Systems Design: A Hands-on Guide to the Cypress PSoC

Preface
Contents
List of Figures
List of Tables
Legal Notice
1 Introduction to Embedded System
1.1 The Origin of the Embedded System
1.2 Evolution of Microprocessors
1.3 Embedded System Applications
1.4 Embedded System Control
1.4.1 Types of Embedded System Control
1.4.2 Open-Loop, Closed-Loop and Feedback
1.5 Embedded System Performance Criteria
1.5.1 Polling, Interrupts and ISRs
1.5.2 Latency
1.6 Embedded Systems Subsystems
1.7 Recommended Exercises
References
2 Microcontroller Subsystems
2.1 PSoC 3 and PSoC 5LP: Basic Functionality
2.2 PSoC 3 Overview
2.2.1 The 8051 CPU (PSoC 3)
2.2.1.1 8051 Wrapper
2.2.1.2 8051 Instruction Set
2.2.1.3 Internal and External Data Space Maps
2.2.1.4 Instruction Types
2.2.1.5 Data Transfer Instructions
2.2.1.6 Data Pointer
2.2.1.7 Dual Data Pointer SFRs
2.2.1.8 Boolean Operations
2.2.1.9 Stack Pointer
2.2.1.10 Program Status Word (PSW)
2.2.1.11 Addressing Modes
2.2.2 The 8051 Instruction Set
2.2.3 ARM Cortext M3 (PSoC 5LP)
2.2.4 Instruction Set chap2:rphelan03
2.2.4.1 RISC Versus CISC Systems
2.2.5 Interrupts and Interrupt Handling
2.2.5.1 Interrupt Lines
2.2.5.2 Enabling/Disabling Interrupts
2.2.5.3 Pending Interrupts
2.2.5.4 Interrupt Priority
2.2.5.5 Interrupt Vector Addresses
2.2.5.6 Sleep Mode Behavior
2.2.5.7 Port Interrupt Control Unit
2.2.5.8 Interrupt Nesting
2.2.5.9 Interrupts Masking and Exception Handling
2.2.5.10 Interrupt ``Best Practices''
2.2.6 Memory
2.2.6.1 Memory Security
2.2.6.2 EEPROM
2.2.6.3 Interfacing External Memory
2.2.7 Direct Memory Access (DMA)
2.2.8 Spoke Arbitration
2.2.9 Priority Levels and Latency Considerations
2.2.10 Supported DMA Transaction Modes
2.2.11 PSoC 3's Clocking System
2.2.11.1 The Internal Master Oscillator (IMO)
2.2.11.2 Trimming the IMO
2.2.11.3 Fast-Start IMO
2.2.11.4 Internal Low Speed Oscillator
2.2.11.5 Phase-Locked Loop
2.2.11.6 External 4–33 MHz Oscillator
2.2.11.7 External 32kHz Crystal Oscillator
2.2.11.8 Implementing a Real-Time Clock
2.2.11.9 Clock Distribution
2.2.11.10 USB Clock Support
2.2.12 Clock Dividers
2.2.12.1 Clock Phase
2.2.12.2 Early Phase
2.2.12.3 Clock Synchronization
2.2.13 GPIO
2.3 Power Management
2.3.1 Internal Regulators
2.3.1.1 Sleep Regulator
2.3.1.2 Boost Converter
2.3.1.3 Boost Converter Operating Modes
2.3.1.4 Monitoring Booster Converter Output
2.3.1.5 Monitoring Voltages
2.4 Recommended Exercises
References
3 Sensors and Sensing
3.1 Sensor Fundamentals
3.2 Types of Sensors
3.2.1 Optical Sensors
3.2.2 Potentiometers
3.2.3 Inductive Proximity Sensors
3.2.4 Capacitive Sensing
3.2.5 Magnetic Sensors
3.2.6 Piezoelectric
3.2.7 RF
3.2.8 Ultraviolet
3.2.9 Infrared
3.2.10 Ionizing Sensors
3.2.11 Other Types of Sensors
3.2.12 Thermistors
3.2.12.1 Thermistor Self-Heating
3.2.12.2 Thermistor Dissipation Factor
3.2.12.3 Thernistor Gradient Constant ``B''
3.2.13 Thermocouples
3.2.14 Use of Bridges for TemperatureMeasurement
3.2.15 Sensors and Microcontroller Interfaces
3.3 Recommended Exercises
References
4 Embedded System Processing and I/O Protocols
4.1 Processing Input/Output
4.2 Microcontroller Sub-systems
4.3 Software Development Environments
4.4 Embedded Systems Communications
4.4.1 The RS232 Protocol
4.4.2 USB
4.4.3 Inter-Integrated Circuit Bus (I2C)
4.4.4 Serial Peripheral Interface (SPI)
4.4.5 Controller Area Network (CAN)
4.4.6 Local Interconnect Network (LIN)
4.5 Programmable Logic
4.6 Mixed-Signal Processing
4.7 PSoC: Programmable System on Chip
4.8 Key Features of the PSoC 3/5LP Architectures
4.9 Recommended Exercises
References
5 System and Software Development
5.1 Realizing the Embedded System
5.2 Design Stages
5.3 Signal Flow and the Schematic View of the System
5.3.1 Mason's Rule
5.3.2 Finite State Machines
5.3.3 Coupling and Cohesion
5.3.4 Signal Chains
5.4 Schematic View of the System
5.5 Correlated Double Sampling (CDS)
5.6 Using Components with Configurable Properties
5.7 Types of Resets
5.8 PSoC 3 Startup Procedure
5.8.1 PSoC 3/5LP Bootloaders
5.9 Recommended Exercises
References
6 Hardware Description Languages
6.1 Hardware Description Languages (HDL)
6.2 Design Flow
6.2.1 VHDL
6.2.2 VHDL Abstraction Levels
6.2.3 VHDL Literals
6.2.4 VHDL Data Types
6.2.5 Predefined Data Types and Subtypes
6.2.6 Operator Overloading
6.2.7 VHDL Data Objects
6.2.8 VHDL Operators
6.2.9 Conditional Statements
6.2.10 FOR, WHILE, LOOP, END and EXIT
6.2.11 Object Declarations
6.2.12 FSMs and VHDL
6.3 Verilog
6.3.1 Constants
6.3.2 Data Types
6.3.3 Modules
6.3.3.1 Module Syntax
6.3.4 Operators
6.3.5 Blocking Versus NonblockingAssignments
6.3.6 wire Versus reg Elements
6.3.7 always and initial Blocks
6.3.8 Tri-State Synthesis
6.3.9 Latch Synthesis
6.3.10 Register Synthesis
6.3.10.1 Edge-Sensitive Flip-Flop Synthesis
6.3.10.2 Asynchronous Flip-Flop Synthesis
6.3.11 Verilog Modules
6.3.12 Verilog Tasks
6.3.13 System Tasks
6.4 Verilog Functions
6.5 Warp™
6.6 Verilog/Warp Component Examples
6.7 Comparison of VHDL, VERILOG and Other HDLs
6.8 Recommended Exercises
References
7 PSoC Creator
7.1 PSoC's Integrated Development Environment
7.2 Development Tools
7.3 The PSoC Creator IDE
7.3.1 Workspace Explorer
7.3.2 PSoC Creator's Component Library
7.3.3 PSoC Creator's Notice List and Build Output Windows
7.3.4 Design-Wide Resources
7.3.5 PSoC Debugger
7.3.6 Creating Components
7.4 Creating a PSoC 3 Design
7.4.1 Design Rule Checker
7.5 The Software Tool Chain
7.6 Opening or Creating a Project
7.7 Assembly Language and PSoC 3
7.8 Writing Assembly Code in PSoC Creator
7.9 Big Endian vs. Little Endian
7.10 Reentrant Code
7.11 Building an Executable: Linking, Librariesand Macros
7.12 Running/Fixing a Program (Debugger Environment)
7.13 PSoC 3 Debugging
7.13.1 Breakpoints
7.13.2 The JTAG Interface
7.14 Programming the Target Device
7.15 Intel Hex Format
7.15.1 Organization of Hex File Data
7.16 Porting PSoC 3 Applications to PSoC 5LP
7.16.1 CPU Access
7.16.2 Keil C 8051 Compiler Keywords(Extensions)
7.16.3 DMA Access
7.16.3.1 DMA Source and Destination Addresses
7.16.4 Time Delays
7.17 Re-entrant Code
7.18 Code Optimization
7.18.1 Techniques for Optimizing 8051 Code
7.19 Real-Time Operating Systems
7.19.1 Tasks, Processes, Multi-Threading and Concurrency
7.19.2 Task Scheduling and Dispatching
7.19.3 PSoC Compatible Real-Time Operating Systems
7.20 Additional Reference Materials
7.21 Recommended Exercises
References
8 Programmable Logic
8.1 Programmable Logic Devices
8.2 Boundary-Scanning
8.3 Macrocells, Logic Arrays and UDBs
8.4 The Datapath
8.4.1 Input/Output FIFOs
8.4.2 Chaining
8.4.3 Datapath Inputs and Outputs
8.4.4 Datapath Working Registers
8.5 Datapath ALU
8.5.1 Carry Functions
8.5.2 ALU Masking Operations
8.5.3 All Zeros and Ones Detection
8.5.4 Overflow
8.5.5 Shift Operations
8.5.6 Datapath Chaining
8.5.7 Datapath and CRC/PRS
8.5.8 CRC/PRS Chaining
8.5.9 CRC/Polynomial Specification
8.5.10 External CRC/PRS Mode
8.5.11 Datapath Outputs and Multiplexing
8.5.12 Compares
8.6 Dynamic Configuration RAM (DPARAM)
8.7 Status and Control Mode
8.7.1 Status Register Operation
8.7.2 Status Latch During Read
8.7.3 Transparent Status Read
8.7.4 Sticky Status, with Clear on Read
8.8 Counter Mode
8.8.1 Sync Mode
8.8.2 Status and Control Clocking
8.8.3 Auxiliary Control Register
8.8.3.1 FIFO0 Clear, FIFO1 Clear
8.8.3.2 Interrupt Enable
8.8.3.3 Counter Control
8.9 Boolean Functions
8.9.1 Simplifying/Constructing Functions
8.9.2 Karnaugh Maps
8.10 Combinatorial Circuits
8.11 Sequential Logic
8.12 Finite State Machines
8.13 Recommended Exercises
References
9 Communication Peripherals
9.1 Communications Protocols
9.2 I2C
9.2.1 Application Programming Interface
9.2.2 PSoC 3/5 I2C Slave-Specific Functions
9.2.3 PSoC 3/5 I2C Master/Multi-Master Slave
9.2.4 Master and Multimaster Functions
9.2.5 Multi-Master-Slave Mode
9.2.6 Multi-Master-Slave Mode Operation
9.2.7 Arbitrage on Address Byte Limitations (Hardware Address Match Enabled)
9.2.8 Start of Multi-Master-Slave Transfer
9.2.9 Interrupt Function Operation
9.2.10 Manual Function Operation
9.2.11 Wakeup and Clock Stretching
9.2.12 Slave Operation
9.2.13 Start of Multi-Master-Slave Transfer
9.3 Universal Asynchronous Rx/Tx (UART)
9.3.1 UART Application Programming Interface
9.3.2 Interrupts
9.3.3 UART Config Tab
9.3.4 Parity
9.3.5 Simplex, Half and Full Duplex
9.3.6 RS232, RS422 and RS485 Protocols
9.4 Serial Peripheral Interface (SPI)
9.4.1 SPI Device Configurations
9.4.2 SPI Master
9.4.3 SPI I/O
9.4.4 Tx Status Register
9.4.5 RX Status Register
9.4.6 Tx Data Register
9.4.7 Rx Data Register
9.4.8 Conditional Compilation Information
9.5 Serial Peripheral Interface Slave
9.5.1 Slave I/O Connections
9.6 Universal Serial Bus (USB) Basics
9.6.1 USB Architecture
9.6.2 USB Signal Paths
9.6.3 USB Endpoints
9.6.4 USB Transfer Structure
9.6.5 Transfer Composition
9.6.6 Packet Types
9.6.7 Transaction Types
9.6.8 USB Descriptors
9.6.9 Configuration Descriptor
9.7 Full Speed USB (USBFS)
9.7.1 Endpoint Memory Management
9.7.2 Enabling VBUS Monitoring
9.7.2.1 USBFS MIDI
9.7.3 USB Function Calls
9.8 Controller Area Network (CAN)
9.8.1 PSoC Creator's CAN Component
9.8.2 Interrupt Service Routines
9.8.3 Hardware Control of Logic on Interrupt Events
9.8.4 Interrupt Output Interaction with DMA
9.8.5 Custom External Interrupt ServiceRoutine
9.8.6 Interrupt Output Interaction with the Interrupt Subsystem
9.9 S/PDIF Transmitter (SPDIF_Tx)
9.9.1 SPDIF_Tx component I/O Connections
9.9.2 SPDIF_Tx API
9.9.3 S/PDIF Data Stream Format
9.9.4 S/PDIF and DMA Transfers
9.9.5 S/PDIF Channel Encoding
9.9.6 S/PDIF Protocol Hierarchy
9.9.7 S/PDIF Error Handling
9.9.7.1 Enabling
9.9.8 S/PDIF Channel Encoding
9.9.9 SPDIF Registers
9.10 Vector CAN (VCAN)
9.10.1 Vector CAN I/O Connections
9.10.2 Vector CAN API
9.11 Inter-IC Sound Bus (I2S)
9.11.1 Functional Description of the I2SComponent
9.11.2 Tx and Rx Enabling
9.11.3 I2S Input/Output Connections
9.11.4 I2S Macros
9.11.5 I2S APIs
9.11.6 I2S Error Handling
9.12 Local Interconnect Network (LIN)
9.12.1 LIN Slave
9.12.2 PSoC and LIN Bus Hardware Interface
9.13 LCD (Visual Communication)
9.13.1 Resistive Touch
9.13.2 Measurement Methods
9.13.3 Application Programming Interface
9.13.4 Capacitive Touchscreens
9.14 Recommended Exercises
References
10 Phase-Locked Loops
10.1 PLL Use and Application
10.2 Phase Detection (See Figs.10.3 and 10.4)
10.3 Voltage-Controlled Oscillators
10.4 Modeling a Voltage-Controlled Oscillator
10.5 Phase and Frequency
10.6 PLL Lowpass Filter
10.6.1 Phase and Jitter
10.6.2 Phase Noise
10.7 Key PLL Parameters
10.8 Digital Phase-Locked Loops
10.9 PSoC 3 and PSoC 5LP Phase-Locked Loop
10.10 PSoC 3 and PSoC 5LP PLL Topology
10.11 Recommended Exercises
References
11 Analog Signal Processing
11.1 Mixed-Signal Evolution
11.2 Analog Functions
11.2.1 Operational Amplifiers (OpAmps)
11.3 Fundamental Linear System Concepts
11.3.1 Euler's Equation
11.3.2 Impulse Characterization of a System
11.3.3 Fourier, Laplace and Z Transforms
11.3.4 Linear Time Invariant Systems (LTIs)
11.3.5 Impulse and Impulse Response Functions
11.3.6 Transfer, Driving and Response Functions
11.3.7 Common Mode Voltages
11.3.8 Common Mode Rejection
11.3.9 Total Harmonic Distortion (THD)
11.3.10 Noise
11.3.11 Multiple Noise Sources
11.3.12 Signal-to-Noise Ratio
11.3.13 Impedance Matching
11.4 OpAmps and Feedback
11.4.1 The Ideal Operational Amplifier
11.4.2 Non-ideal Operational Amplifiers
11.4.3 Inverting Amplifiers
11.4.4 Miller Effect
11.4.5 Noninverting Amplifier
11.4.6 Summing Amplifier
11.4.7 Difference Amplifier
11.4.8 Logarithmic Amplifier
11.4.9 Exponential Amplifier
11.4.10 OpAmp Integrator
11.4.11 Differentiator
11.4.12 Instrumentation Amplifiers
11.4.13 Transimpedance Amplifier (TIA)
11.4.14 Gyrators
11.5 Capacitance Multiplier
11.6 Analog Comparators
11.6.1 Schmitt Triggers
11.6.2 Sample/Track-and-Hold Circuits
11.6.2.1 Input/Output Connections
11.6.2.2 Power
11.6.2.3 Sample Clock Edge
11.7 Switched-Capacitor Blocks
11.7.1 Switched-Capacitor and Continuous-Time Devices
11.7.1.1 PSoC 3/5LP OpAmps and PGAs
11.7.2 Continuous-Time Unity Gain Buffer
11.7.3 Continuous-Time, Programmable Gain Amplifier
11.7.4 Continuous-Time TransimpedanceAmplifier
11.8 PSoC 3/5LP Comparators
11.8.1 Power Settings
11.8.1.1 Hysteresis
11.8.1.2 Wake-Up from Sleep
11.8.1.3 Comparator Clock
11.8.1.4 Offset Trim
11.9 PSoC 3/5LP Mixers
11.9.1 Basic Mixing Theory
11.9.2 PSoC 3/5LP Mixer API
11.9.3 Continuous-Time Mixer
11.9.4 Sampled-Mixer
11.10 Filters
11.10.1 Ideal Filters
11.10.2 Bode Plots
11.10.3 Passive Filters
11.10.4 Analog Active Filters
11.10.4.1 Sallen–Key Filters (S-K)
11.10.4.2 Sallen–Key Unity-Gain Lowpass Filter
11.10.4.3 Sallen–Key Highpass Filter
11.10.4.4 Sallen–Key Bandpass Filter
11.10.4.5 An Allpass Filter
11.10.5 Pulse Width Modulator (PWM)
11.11 DC-DC Converters
11.12 PSoC Creator's Power Supervision Components
11.12.1 Voltage Fault Detector (VFD)
11.12.2 Trim and Margin
11.12.3 Trim and Margin I/O Connections
11.13 Voltage Sequencer
11.13.1 Voltage Sequencer I/O
11.14 Power Monitor Component
11.14.1 Power Converter Voltage Measurements
11.14.2 Power Converter Current Measurements
11.14.3 Auxiliary Voltage Measurements
11.14.4 ADC Sequential Scanning
11.14.5 I/O Connections
11.15 PSoC Creator's Fan Controller Component
11.15.1 FanController API Functions
11.16 Recommended Exercises
References
12 Digital Signal Processing
12.1 Digital Filters
12.2 Finite Impulse Response (FIR) Filters
12.3 Infinite Impulse (IIR) Response Filters
12.4 Digital Filter Blocks (DFBs)
12.5 PSoC 3/5LP Filter Wizard
12.5.1 Sinc Filters
12.6 Data Conversion
12.7 Analog to Digital Conversion
12.8 Basic ADC Concepts
12.8.1 Delta-Sigma ADC
12.8.2 PSoC 3/5LP Delta-Sigma Converter
12.8.3 Successive Approximation Register ADC
12.8.4 Analog MUX
12.8.4.1 Allowable Input/Output Connections
12.8.4.2 The AMux API
12.8.5 Analog/Digital Virtual MUX
12.8.6 PSoC 3/5LP Delta-Sigma ADC (ADC_DelSig)
12.8.7 I/O Pins
12.8.8 Digital to Analog Converters (DACs)
12.8.9 PSoC 3/5LP Voltage DAC (VDAC8)
12.8.9.1 Input/Output Connections
12.8.10 PSoC 3/5LP Current DAC (IDAC8)
12.9 PSoC 3/5LP Gates
12.9.1 Gate Details
12.9.2 Tri-State Buffer (Bufoe 1.10)
12.9.3 D Flip-flop
12.9.4 Digital Multiplexer and Demultiplexer
12.9.5 Lookup Tables (LUTs)
12.9.6 Logic High/Low
12.9.7 Registers
12.9.8 PSoC 3/5LP Counters
12.9.8.1 UDB Implementation of a Counter
12.9.8.2 Clock Selection
12.9.9 Timers
12.9.9.1 PSoC 3/5LP Timer I/O Connections
12.9.10 Shift Registers
12.9.11 Pseudo-Random Sequence Generator(PRS)
12.9.12 Precision Illumination Signal Modulation (PrISM)
12.9.13 Quadrature Decoder
12.9.14 The QuadDec Application Programming Interface
12.9.15 Cyclic Redundancy Check (CRC)
12.10 Recommended Exercises
References
13 The Pierce Oscillator
13.1 Historical Background
13.2 Q Factor
13.2.1 Barkhausen Criteria
13.3 External Crystal Oscillators
13.4 ECO Automatic Gain Control
13.5 MHz ECO Error Detection
13.6 Amplitude Adjustment
13.7 Real-Time Clock
13.8 Resonator Equivalent Circuit
13.8.1 ECO Frequency Accuracy
13.8.2 Initial Frequency Tolerance
13.8.3 Frequency Temperature Variation
13.8.4 Resonator Aging
13.8.5 Load Capacitance Trim Sensitivity
13.9 ECO Trim Sensitivity
13.9.1 Negative Resistance Characteristics
13.9.2 Series and Feedback Resistors
13.10 Drive Level
13.10.1 Reducing Clock Power Consumption with ECOs
13.10.2 ECO Startup Behavior
13.10.3 32-kHz ECO Startup Behavior
13.11 Using Clock Resources in PSoC Creator
13.12 Recommended Exercises
References
14 PSoC 3/5LP Design Examples
14.1 Peak Detection
14.2 Debouncing Techniques
14.3 Sampling and Switch Debouncing
14.3.1 Switch Debouncing Using Software
14.3.2 Hardware Switch Debouncing
14.4 PSoC 3/5LP Amplitude Modulation/Demodulation
14.5 PSoC Creator's WaveDAC8 Component
References
15 PSoC Creator Function Calls
15.1 Delta-Sigma Analog to Digital Converter 3.30 (ADC_DelSig)
15.1.1 ADC_DelSig Functions 3.30
15.1.2 ADC DelSig Function Calls 3.30
15.2 Inverting Programmable Gain Amplifier(PGA_Inv) 2.0
15.2.1 PGA_Inv) Functions 2.0
15.2.2 PGA_Inv) Function Calls 2.0
15.3 Programmable Gain Amplifier (PGA) 2.0
15.3.1 PGA Functions 2.0
15.3.2 PGA Function Calls 2.0
15.4 Trans-Impedance Amplifier (TIA) 2.0
15.4.1 TIA Functions 2.0
15.4.2 TIA Function Calls 2.0
15.5 SC/CT Comparator (SCCT_Comp) 1.0
15.5.1 SC/CT Comparator (SC/CT_Comp) Functions 1.0
15.5.2 SC/CT Comparator (SC/CT_Comp) Function Calls 1.0
15.6 Mixer 2.0
15.7 Mixer Functions 2.0
15.8 Mixer Function Calls 2.0
15.9 Sample/Track and Hold Component 1.40
15.9.1 Sample/Track and Hold Component 1.40 Functions 1.40
15.9.2 Sample/Track and Hold Component Function Calls 1.40
15.10 Controller Area Network (CAN) 3.0
15.10.1 Controller Area Network (CAN) Functions 3.0
15.10.2 Controller Area Network (CAN) Function Calls 3.0
15.11 Vector CAN 1.10
15.11.1 Vector CAN Functions 1.10
15.11.2 Vector CAN Function Calls 1.10
15.12 Filter 2.30
15.12.1 Filter Functions 2.30
15.12.2 Filter Function Calls 2.30
15.13 Digital Filter Block Assembler 1.40
15.13.1 Digital Filter Block AssemblerFunctions 1.40
15.13.2 Digital Filter Block Assembler Function Calls 1.40
15.14 Power Monitor 8, 16 and 32 Rails 1.60
15.14.1 Power Monitor Functions for 8, 16 and 32 Rails 1.60
15.14.2 Power Monitor Functions for 8, 16 and 32 Rails 1.60
15.15 ADC Successive Approximation Register 3.10 (ADC_SAR)
15.15.1 ADC_SAR Functions 3.10
15.15.2 ADC_SAR Function Calls 3.10
15.16 Sequencing Successive Approximation ADC 2.10 (ADC_SAR_Seq)
15.16.1 ADC_SAR_Seq Functions 2.10
15.16.2 ADC_SAR_Seq Function Calls 2.10
15.17 Operational Amplifier (OpAmp) 1.90
15.17.1 OpAmp Functions 1.90
15.17.2 OpAmp Function Calls 1.90
15.18 Analog Hardware Multiplexer (AMUX) 1.50
15.18.1 Analog Hardware Multiplexer (AMUX 1.50) Functions 1.50
15.18.2 Analog Hardware Multiplexer (AMUX) Function Calls 1.50
15.19 Analog Hardware Multiplexer Sequencer(AMUXSeq) 1.80
15.19.1 Analog Multiplexer SequencerFunctions (AMUXSeq) 1.80
15.19.2 Analog Multiplexer Sequencer Function Calls (AMUXSeq) 1.80
15.20 Analog Virtual Mux 1.0
15.20.1 Analog Virtual Mux Functions 1.0
15.21 Comparator (Comp) 2.00
15.21.1 Comparator Functions (Comp) 2.00
15.21.2 Comparator Function Calls (Comp) 2.00
15.22 Scanning Comparator 1.10
15.22.1 Scanning Comparator Functions 1.10
15.22.2 Scanning Comparator Function Calls 1.10
15.23 8-Bit Current Digital to Analog Converter(iDAC8) 2.00
15.23.1 iDAC8 Functions 2.00
15.23.2 iDAC8 Function Calls 2.00
15.24 Dithered Voltage Digital/Analog Converter (DVDAC) 2.10
15.24.1 DVDAC Functions 2.10
15.24.2 DVDAC Function Calls 2.10
15.25 8-Bit Voltage Digital to Analog Converter(VDA8) 1.90
15.25.1 VDA8 Functions 1.90
15.25.2 VDA8 Function Calls (VDA8) 1.90
15.26 8-Bit Waveform Generator (WaveDAC8) 2.10
15.26.1 WaveDAC8 Functions 2.10
15.26.2 WaveDAC8 Function Calls 2.10
15.27 Analog Mux Constraint 1.50
15.27.1 Analog Mux Constraint Functions 1.50
15.28 Net Tie 1.50
15.28.1 Net Tie 1.50
15.29 Analog Net Constraint 1.50
15.29.1 Analog Net Constraint Functions 1.50
15.30 Analog Resource Reserve 1.50
15.30.1 Analog Resource Reserve Functions 1.50
15.31 Stay Awake 1.50
15.31.1 Stay Awake Functions 1.50
15.32 Terminal Reserve 1.50
15.33 Terminal Reserve Functions 1.50
15.34 Voltage Reference (Vref) 1.70
15.35 Capacitive Sensing (CapSense CSD) 3.5
15.35.1 Capacitive Sensing Functions 3.5
15.35.2 Capacitive Sensing Function Calls (CapSense CSD) 3.5
15.35.3 Capacitive Sensing Scanning SpecificAPIs 3.50
15.35.4 Capacitive Sensing API Function Calls 3.50
15.35.5 Capacitive Sensing High-Level APIs 3.50
15.35.6 Capacitive Sensing Hi-Level Function Calls 3.50
15.36 File System Library (emFile) 1.20
15.36.1 File System Library Functions 1.20
15.36.2 File System Library Function Calls 1.20
15.37 EZI2C Slave 2.00
15.37.1 EZI2C Slave Functions 2.00
15.37.2 EZI2C Slave Function Calls 2.00
15.38 I2C Master/Multi-Master/Slave 3.5
15.38.1 I2C Master/Multi-Master/SlaveFunctions 3.5
15.38.2 I2C Master/Multi-Master/Slave Function Calls 3.5
15.38.3 Slave Functions 3.50
15.38.4 I2C Master/Multi-Master/Slave Function Calls 3.50
15.38.5 I2C Master and Multi-MasterFunctions 3.50
15.38.6 I2C Slave Function Calls 3.5
15.39 Inter-IC Sound Bus (I2S) 2.70
15.39.1 Inter-IC Sound Bus (I2S) Functions 2.70
15.39.2 Inter-IC Sound Bus (I2S) FunctionCalls 2.70
15.39.3 Macro Callback Functions 2.70
15.40 MDIO Interface Advanced 1.20
15.40.1 MDIO Interface Functions 1.20
15.40.2 MDIO Interface Function Calls 1.20
15.41 SMBus and PMBus Slave 5.20
15.41.1 SMBus and PMBus SlaveFunctions 5.20
15.41.2 SMBus and PMBus Slave Function Calls 5.20
15.42 Software Transmit UART 1.50
15.42.1 Software Transmit UART Functions 1.50
15.42.2 Software Transmit UART FunctionCalls 1.50
15.43 S/PDIF Transmitter (SPDIF_Tx) 1.20
15.43.1 S/PDIF Transmitter Functions 1.20
15.43.2 S/PDIF Transmitter Function Calls 1.20
15.44 Serial Peripheral Interface (SPI) Master 2.50
15.44.1 Serial Peripheral Interface (SPI) Master Functions 2.50
15.44.2 Serial Peripheral Interface (SPI) Master Function Calls 2.50
15.45 Serial Peripheral Interface (SPI) Slave 2.70
15.45.1 Serial Peripheral Interface (SPI) Slave Functions 2.70
15.46 Serial Peripheral Interface (SPI) Slave Function Calls 2.70
15.47 Universal Asynchronous Receiver Transmitter (UART) 2.50
15.47.1 UART Functions 2.50
15.47.2 UART Function Calls 2.50
15.47.3 UART Bootload Support Functions 2.50
15.47.4 UART Bootloader Support Function Calls 2.50
15.48 Full Speed USB (USBFS) 3.20
15.48.1 USBFS Functions 3.20
15.48.2 USBFS Function Calls 3.20
15.48.3 USBFS Bootloader Support 3.20
15.48.4 USBFS Bootloader SupportFunctions 3.20
15.48.5 USBFS Bootloader Support Function Calls 3.20
15.48.6 USB Suspend, Resume and Remote Wakeup 3.20
15.48.6.1 USB Suspend, Resume and Remote Wakeup Functions
15.48.6.2 USB Suspend, Resume and Remote Wakeup Function Calls 3.20
15.48.7 Link Power Management (LPM) Support
15.48.7.1 Link Power Management (LPM) Support Functions
15.48.7.2 Link Power Management (LPM) Support Function Calls
15.49 Status Register 1.90
15.49.1 Status Counter Functions 1.90
15.49.2 Status Register Function Calls 1.90
15.50 Counter 3.0
15.50.1 Counter Functions 3.0
15.50.2 Counter Function Calls 3.0
15.51 Basic Counter 1.0
15.52 Basic Counter Functions 1.0
15.53 Cyclic Redundancy Check (CRC) 2.50
15.53.1 CRC Functions 2.50
15.53.2 CRC Function Calls 2.50
15.54 Precision Illumination Signal Modulation(PRISM) 2.20
15.54.1 PRISM Functions 2.20
15.54.2 PRISM Function Calls 2.20
15.55 Pseudo Random Sequence (PRS) 2.40
15.55.1 PRS Functions 2.40
15.55.2 PRS Function Calls 2.40
15.56 Pulse Width Modulator (PWM) 3.30
15.56.1 PWM Functions 3.30
15.56.2 PWM Function Calls 3.30
15.57 Quadrature Decoder (QuadDec) 3.0
15.57.1 QuadDec Functions 3.0
15.57.2 QuadDec Function Calls 3.0
15.58 Shift Register (ShiftReg) 2.30
15.58.1 ShiftReg Functions 2.30
15.58.2 ShiftReg Function Calls 2.30
15.59 Timer 2.80
15.59.1 Timer Functions 2.80
15.59.2 Timer Function Calls 2.80
15.60 AND 1.0
15.60.1 AND Functions 1.0
15.61 Tri-State Buffer (Bufoe) 1.10
15.61.1 Tri-State Buffer (Bufoe) Functions 1.10
15.62 D Flip-Flop 1.30
15.62.1 D Flip-Flop Functions 1.30
15.63 D Flip-Flop w/ Enable 1.0
15.64 D Flip-Flop w/ Enable Functions 1.00
15.65 Digital Constant 1.0
15.65.1 Digital Constant Functions 1.00
15.66 Lookup Table (LUT) 1.60
15.66.1 Lookup Table (LUT) Functions 1.60
15.67 Digital Multiplexer and Demultiplexer 1.10
15.67.1 Digital Multiplexer and Demultiplexer Functions 1.10
15.68 SR Flip-Flop 1.0
15.69 SR Flip-Flop Functions 1.0
15.70 Toggle Flip-Flop 1.0
15.70.1 Toggle Flip-Flop 1.0 Functions
15.71 Control Register 1.8
15.71.1 Control Register Functions 1.8
15.71.2 Control Register Function Calls 1.8
15.72 Status Register 1.90
15.72.1 Status Register Functions 1.90
15.72.2 Status Register Function Calls 1.90
15.73 Debouncer 1.00
15.73.1 Debouncer Functions 1.00
15.74 Digital Comparator 1.00
15.74.1 Digital Comparator 1.00
15.75 Down Counter 7-bit (Count7) 1.00
15.75.1 Down Counter 7-bit (Count7)Functions 1.00
15.75.2 Down Counter 7-bit (Count7) Function Calls 1.00
15.76 Edge Detector 1.00
15.76.1 Edge Detector Functions 1.00
15.76.2 Digital Comparator 1.0
15.76.3 Digital Comparator Functions 1.00
15.77 Frequency Divider 1.0
15.77.1 Frequency Divider Functions 1.00
15.78 Glitch Filter 2.00
15.78.1 Glitch Filter Functions 2.00
15.79 Pulse Converter 1.00
15.79.1 Pulse Converter Functions 1.00
15.80 Sync 1.00
15.81 Sync Functions 1.00
15.82 UDB Clock Enable (UDBClkEn) 1.00
15.82.1 UDB Clock Enable (UDBClkEn) Functions 1.00
15.83 LED Segment and Matrix Driver (LED_Driver) 1.10
15.83.1 LED Segment and Matrix Driver (LED_Driver) Functions 1.10
15.83.2 LED Segment and Matrix Driver (LED_Driver) Function Calls 1.10
15.84 Character LCD 2.00
15.84.1 Character LCD Functions 2.00
15.84.2 Character LCD Function Calls 2.00
15.85 Character LCD with I2C Interface (I2C LCD) 1.20
15.85.1 Character LCD with I2C Interface (I2C LCD) Functions 1.20
15.85.2 Character LCD with I2C Interface (I2C LCD) Function Calls 1.20
15.86 Graphic LCD Controller (GraphicLCDCtrl) 1.80
15.86.1 Graphic LCD Controller (GraphicLCDCtrl) Functions 1.80
15.86.2 Graphic LCD Controller (GraphicLCDCtrl) Function Calls 1.80
15.87 Graphic LCD Interface (GraphicLCDIntf) 1.80
15.87.1 Graphic LCD Interface (GraphicLCDIntf) Functions 1.80
15.87.2 Graphic LCD Interface (GraphicLCDIntf) Function Calls 1.80
15.88 Static LCD (LCD_SegStatic) 2.30
15.88.1 LCD_SegStatic Function 2.30
15.88.2 LCD_SegStatic Function Calls 2.30
15.88.3 Optional Helper APIs (LCD_SegStatic Functions)
15.88.4 Optional Helper APIs (LCD_SegStatic) Function Calls
15.88.5 Pins API (LCD_SegStatic) Functions
15.88.6 Pins API (LCD_SegStatic) Function Calls
15.89 Resistive Touch (ResistiveTouch) 2.00
15.89.1 Resistive Touch Functions 2.00
15.89.2 Resistive Touch Function Calls 2.00
15.90 Segment LCD (LCD_Seg) 3.40
15.90.1 Segment LCD (LCD_Seg) Functions 3.40
15.90.2 Segment LCD (LCD_Seg) Function Calls 3.40
15.90.3 Segment LCD (LCD_Seg)—Optional Helper APIs Functions
15.90.4 LCD_Seg—Optional Helper APIs Function Calls
15.90.5 LCD_Seg—Pins Functions
15.90.6 LCD_Seg—Pins Function Calls
15.91 Pins 2.00
15.91.1 Pins Functions 2.00
15.91.2 Pins Function Calls 2.00
15.91.3 Pins—Power Management Functions2.00
15.91.4 Pins—Power Management Functions2.00
15.92 Trim and Margin 3.00
15.92.1 Trim and Margin Functions 3.00
15.92.2 Trim and Margin Function Calls 3.00
15.93 Voltage Fault Detector (VFD) 3.00
15.93.1 Voltage Fault Detector (VFD) Functions3.00
15.93.2 Voltage Fault Detector (VFD) Function Calls 3.00
15.94 Voltage Sequencer 3.40
15.94.1 Voltage Sequencer Functions 3.40
15.94.2 Voltage Sequencer Function Calls 3.40
15.94.3 Voltage Sequencer—Run-Time Configuration Functions 3.40
15.94.4 Voltage Sequencer—Run-Time Configuration Function Calls 3.40
15.95 Boost Converter (BoostConv) 5.00
15.95.1 Boost Converter (BoostConv) Functions5.00
15.95.2 Boost Converter (BoostConv) Function Calls 5.00
15.96 Bootloader and Bootloadable 1.60
15.96.1 Bootloader Functions 1.60
15.96.2 Bootloader Function Calls 1.60
15.96.3 Bootloadable Function Calls 1.60
15.97 Clock 2.20
15.97.1 Clock Functions 2.20
15.97.2 Clock Function Calls 2.20
15.97.3 UDB Clock Enable (UDBClkEn) 1.00
15.97.4 UDB Clock Enable (UDBClkEn) Functions 1.00
15.98 Die Temperature 2.10
15.98.1 Die Temperature Functions 2.10
15.98.2 Die Temperature Function Calls 2.10
15.99 Direct Memory Access (DMA) 1.70
15.99.1 Direct Memory Access Functions 1.70
15.99.2 Direct Memory Access Function Calls 1.70
15.100 DMA Library APIs (Shared by All DMA Instances)1.70
15.100.1 DMA Controller Functions
15.100.2 Channel Specific Functions 1.70
15.100.3 Channel Specific Function Calls 1.70
15.100.4 Transaction Description Functions 1.70
15.100.5 Transaction Description Function Calls1.70
15.101 EEPROM 3.00
15.101.1 EEPROM Functions 3.00
15.101.2 EEPROM Function Calls 3.00
15.102 Emulated EEPROM 2.20
15.102.1 Emulated EEPROM functions 2.20
15.102.2 Emulated EEPROM 2.20 function Calls to Wrapper Functions
15.103 External Memory Interface 1.30
15.103.1 External Memory Interface Functions 1.30
15.103.2 External Memory Interface Function Calls 1.30
15.104 Global Signal Reference (GSRef 2.10)
15.104.1 Global Signal Reference (GSRef Functions 2.10)
15.105 ILO Trim 2.00
15.105.1 ILO Functions 2.00
15.105.2 ILO Function Calls 2.00
15.106 Interrupt 1.70
15.106.1 Interrupt Functions 1.70
15.106.2 Interrupt Function Calls 1.70
15.107 Real Time Clock (RTC) 2.00
15.107.1 Real Time Clock (RTC) Functions 2.00
15.107.2 Real Time Clock (RTC) Functions 2.00
15.108 SleepTimer 3.20
15.108.1 SleepTimer Function Calls 3.20
15.108.2 Sleep Timer Function Calls 3.20
15.109 Fan Controller 4.10
15.109.1 Fan Controller Functions 4.10
15.109.2 Fan Controller Function Calls 4.10
15.110 RTD Calculator 1.20
15.110.1 RTD Calculator Functions 1.20
15.110.2 RTD Calculator Function Calls 1.20
15.111 Thermistor Calculator 1.20
15.111.1 Thermistor Calculator Functions 1.20
15.111.2 Thermistor Calculator Function Calls 1.20
15.112 Thermocouple Calculator 1.20
15.112.1 Thermocouple Calculator Functions 1.20
15.112.2 Thermocouple Calculator Function Calls1.20
15.113 TMP05 Temp Sensor Interface 1.10
15.113.1 TMP05 Temp Sensor Interface Functions1.10
15.113.2 TMP05 Temp Sensor Interface Function Calls 1.10
15.114 LIN Slave 4.00
15.114.1 LIN Slave Functions 4.00
15.114.2 LIN Slave Function Calls 4.00
References
Further Reading
A PSoC 3 Specification Summary
B PSoC 5LP Specification Summary
C Special Function Registers (SFRs)
D Mnemonics
E Glossary
Index