The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration.
This is the first book entirely devoted to the problems associated with synthesis and optimization of VLSI-based CFSMs. We hope that the book will be interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of various digital systems. We think that proposed CFSM models enlarge the class of models applied for implementation of control units with modern VLSI chips.
Author(s): Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka
Series: Lecture Notes in Electrical Engineering, 922
Publisher: Springer
Year: 2023
Language: English
Pages: 304
City: Cham
Preface
Contents
Abbreviations
1 Control Algorithms and Finite State Machines
1.1 Methods of Implementation of Control Algorithms
1.2 Basic Models of Finite State Machines
1.3 Synthesis of Mealy FSM
1.4 Synthesis of Moore FSM
1.5 Synthesis of Microprogram Control Units
1.6 Background of Combined FSMs
References
2 VLSI-based Logic Synthesis
2.1 Evaluation of Logic Elements
2.2 Logic Synthesis with ASICs
2.3 Logic Synthesis with CPLDs
2.4 Logic Synthesis with FPGAs
References
3 ASIC-based Synthesis of CFSMs
3.1 Trivial Matrix Implementation
3.2 Structural Decomposition for Matrix CFSMs
3.3 PES-based Matrix Circuits of Moore FSMs
3.4 Analysis of CFSM-based Matrix Circuits
References
4 Optimization of ASIC-based CFSMs
4.1 CFSMs with Optimal State Assignment
4.2 CFSMs with Transformation of State Codes
4.3 CFSMs with Partial Code Transformation
4.4 CFSMs with Primary Encoding of Classes of PES
References
5 Homogenous CPLD-Based Synthesis of CFSMs
5.1 Preliminary Information
5.2 Synthesis of P CFSM
5.3 Synthesis of CFSMs with Optimal State Assignment
5.4 Synthesis of CFSMs with Transformation of State Codes
5.5 Synthesis of CFSMs with Primary Encoding of Classes
References
6 Heterogeneous CPLD-based Synthesis of CFSMs
6.1 Preliminary Information
6.2 Synthesis of CFSMs with Trivial State Assignment
6.3 Synthesis of CFSMs with Optimal State Assignment
6.4 Synthesis of CFSMs with Primary Encoding of Classes
6.5 Synthesis of CFSMs with Transformation of Object Codes
References
7 CPLD-Based Synthesis with Transformation of State Codes
7.1 Synthesis with Complete State Transformation
7.2 Partial State Transformation: Homogenous CPLDs
7.3 Partial State Transformation: Heterogenous CPLDs
7.4 Combining Different Methods of Object Transformation
References
8 FPGA-Based Synthesis of CFSMs
8.1 Preliminary Information
8.2 Primary Encoding of Classes of PES for FPGA-Based GFSMs
8.3 FPGA-Based Synthesis with Transformation of Class Codes
8.4 Twofold State Assignment in CFSMs
References
Appendix Conclusion
Index
