Installation and Maintenance of SDH/SONET, ATM, xDSL, and Synchronization Networks

Preface......Page 13
1.1.1 Signals and Information......Page 17
1.1.2 Transmission Medium......Page 18
1.1.2.1 Attenuation......Page 19
1.1.2.2 Distortion......Page 20
1.1.2.3 Noise......Page 21
1.1.3 Channel Coding......Page 23
1.1.3.2 Alternate mark inversion......Page 24
1.1.3.4 High-density bipolar three zeroes......Page 25
1.1.4 Multiplexing and Multiple Access......Page 26
1.2 Pulse Code Modulation......Page 27
1.3 PDH and T-Carrier......Page 29
1.3.1 Basic Rates: T1 and E1......Page 30
1.4.1 Frame Alignment......Page 31
1.4.3.1 The CRC-4 procedure......Page 32
1.4.3.3 Advantages of the CRC-4 method......Page 33
1.4.4 Supervision Bits......Page 34
1.4.6 NFAS - Alarm Bit......Page 35
1.4.8 CAS Signaling Multiframe......Page 36
1.4.8.2 CAS nonmultiframe alignment signal......Page 37
1.5 The Plesiochronous Digital Hierarchy......Page 38
1.5.2 Multiplexing Level 2: 8Mbps......Page 39
1.5.5 Service Bits in Higher Level Frames......Page 40
1.5.6 Plesiochronous Synchronization......Page 42
1.5.7.1 Justification opportunity bits......Page 43
1.6 Managing Alarms in Higher Level Hierarchies......Page 44
1.7.1 The DS1 Frame......Page 45
1.7.3 The DS3 Frame......Page 48
2.1 The Emergence of SDH/SONET Networks......Page 51
2.1.1 Limitations of Plesiochronous Networks......Page 52
2.1.2 The SDH/SONET Challenge......Page 53
2.1.2.2 Providing circuits for public networks......Page 54
2.2 Comparison of SDH and SONET......Page 55
2.3.1 Network Elements......Page 56
2.3.2 Network Topology......Page 57
2.3.4 SDH/SONET Layers......Page 58
2.3.4.1 Path layers......Page 59
2.3.4.4 Physical layers......Page 60
2.4 SDH/SONET Formats and Procedures......Page 61
2.4.1 SDH/SONET Frame Structure......Page 62
2.4.1.3 Tributary units and tributary unit groups......Page 63
2.4.1.4 Administrative unit......Page 64
2.5 SDH Transport Services......Page 65
2.6 Transporting PDH/T-Carrier Tributaries......Page 69
2.6.1 Transport on VC-4 or STS-3c SPE......Page 70
2.6.2 Transport on VC-3......Page 71
2.6.3 Transport of 2-Mbps Circuits......Page 73
2.7.1 Payload Synchronization......Page 76
2.7.2.1 Pointer Generation......Page 77
2.8 Overheads......Page 80
2.8.1 Path Overhead......Page 82
2.8.2 Section Overhead......Page 83
2.8.3 The SDH/SONET Hierarchy......Page 85
2.9 Concatenation......Page 87
2.9.2 Virtual Concatenation......Page 88
2.10 Maintenance......Page 90
2.10.1 SDH/SONET Events......Page 92
2.11 Performance Monitoring......Page 94
2.11.1 Bit Error Checking......Page 96
2.11.2 Tandem Connection Monitoring......Page 97
2.11.3 Forward Error Correction......Page 98
2.12 Defects......Page 99
2.13 SDH Resilience......Page 101
2.13.1 Protection Basics......Page 103
2.13.2 Multiplex Section or Line Protection......Page 105
2.13.2.1 VC path protection......Page 107
2.13.2.2 Subnetwork connection protection......Page 108
2.14.1 The TMN Standard......Page 109
2.14.2 TMN Benefits......Page 110
2.15 Next Generation SDH......Page 111
3.1 Introduction......Page 115
3.2.1 ATM Cell Format......Page 117
3.2.2 Virtual Channels and Virtual Paths......Page 119
3.2.3 Basic Principles of ATM Switching......Page 120
3.3.1 Introduction......Page 122
3.3.2 AAL Layer......Page 123
3.3.3.1 ATM layer in terminal equipment......Page 125
3.3.3.3 Virtual channel and virtual path connections......Page 127
3.3.4.1 Physical layer structure......Page 129
3.3.4.2 Transmission medium data stream......Page 130
3.4.1 AAL1 Format......Page 131
3.4.1.2 Transmission of timing information between both ends......Page 132
3.4.2 AAL2 Format......Page 134
3.4.3 AAL3/4 Format......Page 136
3.4.4 AAL5 Format......Page 137
3.5.1 Traffic Characterization Parameters......Page 138
3.5.2 Negotiated QoS Parameters......Page 140
3.5.3 Service Categories......Page 141
3.5.3.3 Nrt-VBR service category......Page 142
3.5.4 Traffic Contract......Page 143
3.5.4.1 The service level agreement in ATM networks......Page 144
3.6 Resource Management......Page 145
3.6.1 Connection Admission Control......Page 146
3.6.1.1 Connection process......Page 147
3.6.2 UPC and NPC Policing Functions......Page 148
3.6.2.1 UPC functionalities......Page 149
3.6.2.2 Traffic control algorithms......Page 150
3.6.3.2 Explicit forward congestion indication (EFCI)......Page 154
3.7.1 ATM as Transport in ADSL......Page 155
3.7.1.2 Internet access service......Page 156
3.7.2 Wireless Local Loop......Page 160
3.7.2.1 Network elements......Page 161
3.7.2.3 Radio frequency planning......Page 162
3.7.2.4 Architecture......Page 163
3.7.2.5 Advantages......Page 164
3.8 Conclusions......Page 165
4.1 The Origin of DSL Technologies......Page 167
4.1.1 The Birth of DSL Technologies: HDSL......Page 168
4.1.2 New Modulation Technologies......Page 170
4.1.3 Asymmetry......Page 171
4.2.1 ADSL System......Page 173
4.2.2 ADSL Transceivers......Page 174
4.3.1 Data and Overhead Buffers......Page 177
4.3.2 Superframes......Page 179
4.4 Coding......Page 181
4.4.1 Error Protection......Page 182
4.4.3 Interleaving......Page 184
4.5 Modulation......Page 185
4.5.2 Constellation Coders......Page 186
4.5.3 DMT Modulation......Page 187
4.6.1 EOC Message Format......Page 190
4.6.2 EOC Commands......Page 191
4.7 Initialization......Page 192
4.7.1.1 Format of information......Page 193
4.7.1.2 Handshake transactions......Page 194
4.7.2 Training......Page 195
4.7.3 Analyzing the Channel......Page 196
4.7.4 Exchanging Information......Page 198
5.1 Architecture of Synchronization Networks......Page 201
5.1.1 Synchronization Network Topologies......Page 203
5.2.1.1 Clock transfer across T-carrier/PDH networks......Page 205
5.2.1.2 Clock transfer across SDH/SONET links......Page 206
5.2.3 Global Positioning System......Page 207
5.3.1.1 Consequences of frequency offset in SDH/SONET......Page 208
5.3.2 Phase Fluctuation......Page 210
5.3.2.1 Jitter......Page 211
5.3.2.2 Wander......Page 212
5.4 Synchronization of Transmission Networks......Page 213
5.4.1 Synchronization in SONET and SDH......Page 214
5.4.2 Synchronization Models......Page 215
5.5 Digital Synchronization and Switching......Page 217
5.6 SSU in a Synchronization Network......Page 219
5.6.1 Functions of SSU......Page 220
6.1 Areas of Application for Test and Measurement......Page 223
6.2 Tests in the Interfaces......Page 224
6.2.2.2 High impedance......Page 225
6.2.2.3 Protected monitoring points......Page 226
6.2.3.2 Digital interface......Page 227
6.2.3.3 Specifications for electrical interfaces......Page 228
6.2.4.1 Optical power and dynamic range......Page 229
6.2.4.2 Measuring receiver sensitivity......Page 230
6.2.5 Measuring Frequency......Page 231
6.3 In-Service and Out-of-Service Measurements......Page 232
6.3.2 Out-of-service Measurements......Page 233
6.3.2.1 Test sequences and structures......Page 234
6.3.2.2 OOS modes......Page 236
6.3.3 In-Service Measurements......Page 241
6.3.4 Connecting a Measurement Device for ISM......Page 244
6.4 Synchronization of NE-Test Set in SDH......Page 246
7.1.1 BERT of Virtual Container......Page 249
7.1.2 Overhead Transparency Test......Page 250
7.2 Stimulus-Response Tests......Page 251
7.2.5 Interaction of Maintenance Signals......Page 252
7.2.5.1 Fault conditions: Detection and response......Page 253
7.3 Stress Tests......Page 254
7.3.2 Generating Pointer Movements......Page 255
7.4 Mux/Demux Tests......Page 256
7.4.1 PDH Mux/Demux Test......Page 257
7.5 Measuring Round Trip Delay......Page 258
7.6.1 Network Security: Concept and Classification......Page 260
7.6.2.1 APS protocol in linear multiplexer section......Page 262
7.6.3 Measurement Procedure......Page 263
7.6.3.1 MSSPRING architecture in a two fiber ring......Page 265
7.6.3.2 Steps to follow......Page 266
7.7.1.2 Measurements in Line with G.821......Page 267
7.7.2.3 Parameters......Page 268
7.7.2.4 Targets......Page 269
7.7.2.5 Distribution of targets......Page 270
7.7.3.3 Error performance events for paths......Page 272
7.7.3.5 Error performance parameters......Page 273
7.7.3.6 Objectives......Page 274
7.7.3.7 Distribution of overall objectives......Page 275
7.7.3.8 Monitoring PDH paths......Page 276
7.7.4.2 Event......Page 277
7.7.4.3 Performance objectives......Page 279
7.7.4.4 Allocation of objectives......Page 280
7.7.4.5 Performance limits......Page 281
7.8 Tests on ADMs and DXC......Page 284
7.8.1 Tributary Continuity Test......Page 285
7.9.1 Transparency Tests......Page 286
7.9.2 Multiplexers......Page 287
7.9.3 Synchronization Measurements......Page 288
7.9.5 Defect Indicators in the Network Management System......Page 289
7.9.6 Path Trace Tests......Page 290
8.2 Performance Parameters in ATM Networks......Page 293
8.2.2 ATM Cell Transfer Outcomes......Page 294
8.2.3.2 Cell loss ratio......Page 295
8.2.3.3 Cell misinsertion rate......Page 296
8.2.3.6 Cell delay variation......Page 297
8.2.4 Performance of Permanent Connections......Page 298
8.3 OAM Functions: In-Service Measurements......Page 299
8.3.1 Presentation of OAM Functions......Page 300
8.3.2.1 SDH-based physical interface......Page 301
8.3.3 ATM Layer OAM Procedures......Page 303
8.3.3.1 F4 flow......Page 304
8.3.3.2 F5 flow......Page 306
8.3.4.1 Types of OAM cells......Page 307
8.3.5.1 AIS/RDI defect indications......Page 308
8.3.5.2 Continuity check......Page 310
8.3.5.3 Loop-back capacity......Page 311
8.3.6.1 Description of performance monitoring cells......Page 312
8.3.6.2 Estimating performance parameters......Page 314
8.3.7 Activation/Deactivation Functions......Page 315
8.4.1 Generating Test Traffic......Page 316
8.4.2.3 Decision algorithm......Page 318
8.4.2.4 Severely errored cell block......Page 320
8.5 Measurement Cycle in ATM Networks......Page 321
8.5.1.2 Switch throughput......Page 322
8.5.1.3 Architecture of a switch......Page 323
8.5.1.4 Traffic administration: Differentiating services......Page 324
8.5.1.5 Traffic administration: Supervising the UPC policer......Page 325
8.5.1.6 Analyzing OAM functions and hierarchical propagation......Page 326
8.5.1.7 Continuity test......Page 328
8.5.2 Installing the Network......Page 330
8.5.3 Network Commissioning......Page 331
8.5.4.1 Physical layer measurements......Page 334
8.5.5 Commissioning in Wireless Local Loop Environments......Page 338
8.5.6.1 Interpreting OAM indication signals to locate problems......Page 342
8.5.6.2 Measuring in-service parameters......Page 343
9.1 Qualification Strategies and Protocols......Page 347
9.1.1.1 Bulk prequalification......Page 348
9.1.2 Qualification During Commissioning......Page 349
9.2.1 Attenuation and Distortion......Page 350
9.2.2 Return Losses......Page 353
9.2.3 Noise......Page 356
9.2.4 Longitudinal Conversion Loss......Page 359
9.2.5.1 Induced coupling in transmission lines......Page 364
9.2.5.2 Analyzing Crosstalk......Page 366
9.2.6.1 Inductive load of the pair......Page 369
9.2.6.2 The effect of bridged taps......Page 372
9.3 Analog Measurements......Page 374
9.3.1.1 Return loss measurements......Page 375
9.3.1.2 Noise measurement......Page 376
9.3.1.3 NEXT measurement......Page 377
9.3.1.5 TDR measurements......Page 378
9.3.2.1 Attenuation measurement......Page 380
9.3.3 Bridged Measurements......Page 381
9.3.4 Digital Measurements......Page 382
10.1.1 Phase Fluctuation......Page 385
10.1.2 Jitter Metrics and Measurement......Page 386
10.1.2.2 Jitter measurement filters......Page 387
10.1.2.3 Measurement interval......Page 388
10.1.3 Measuring Jitter in Output Interfaces......Page 389
10.1.4 Measuring Jitter Tolerance......Page 390
10.1.4.3 Tolerance masks......Page 391
10.1.5 Measuring Jitter Transfer......Page 392
10.1.5.1 Jitter transfer in PDH and T-carrier......Page 393
10.1.5.2 Jitter transfer in SDH and SONET......Page 394
10.1.6.1 Mapping jitter......Page 395
10.1.6.2 Combined jitter......Page 396
10.1.6.3 Measuring combined jitter......Page 397
10.2 Dealing with Wander......Page 398
10.2.2 Measuring Relative and Absolute Wander......Page 399
10.2.3.4 TDEV......Page 400
10.2.3.5 Application......Page 401
10.2.4 Measuring Output Wander......Page 402
10.2.5 Measuring Tolerance to Input Wander......Page 403
10.2.7 Response to Phase Transients......Page 405
10.2.8.2 Measuring phase error in holdover......Page 407
10.3.1.2 Measuring combined jitter in an ADM......Page 409
10.3.2.1 Free-running test......Page 411
10.3.2.2 Synchronization reference switching (I)......Page 412
10.3.2.3 Synchronization reference switching (II)......Page 414
A.1 Cyclic Redundancy Check......Page 419
A.2 RS and BCH Codes......Page 420
A.3 Bit Interleaved Parity......Page 422
B.1 ANSI Masks......Page 425
B.2 ETSI Masks......Page 428
Two-Wire Transmission Line Model......Page 431
C.1 Characteristic Parameters of the Line......Page 432
About the Authors......Page 437