A new advanced textbook/reference providing a comprehensive survey of hardware and software architectural principles and methods of computer systems organization and design. The book is suitable for a first course in computer organization. The style is similar to that of the author's book on assembly language in that it strongly supports self-study by students. This organization facilitates compressed presentation of material. Emphasis is also placed on related concepts to practical designs/chips. Topics: material presentation suitable for self- study; concepts related to practical designs and implementations; extensive examples and figures; details provided on several digital logic simulation packages; free MASM download instructions provided; and end-of-chapter exercises.
Author(s): Sivarama P. Dandamudi
Series: Texts in Computer Science
Publisher: Springer
Year: 2003
Language: English
Pages: 1091
Contents......Page 16
Preface......Page 10
PART I: Overview......Page 32
1 Overview of Computer Organization......Page 34
1.1 Introduction......Page 35
1.2 Programmer’s View......Page 38
1.3 Architect’s View......Page 43
1.4 Implementer’s View......Page 45
1.5 The Processor......Page 47
1.6 Memory......Page 53
1.7 Input/Output......Page 58
1.8 Interconnection: The Glue......Page 61
1.9 Historical Perspective......Page 62
1.10 Technological Advances......Page 64
1.11 Summary and Outline......Page 66
1.12 Exercises......Page 67
PART II: Digital Logic Design......Page 70
2 Digital Logic Basics......Page 72
2.2 Basic Concepts and Building Blocks......Page 73
2.3 Logic Functions......Page 80
2.4 Boolean Algebra......Page 85
2.5 Logic Circuit Design Process......Page 86
2.6 Deriving Logical Expressions from Truth Tables......Page 87
2.7 Simplifying Logical Expressions......Page 89
2.8 Generalized Gates......Page 102
2.9 Multiple Outputs......Page 104
2.10 Implementation Using Other Gates......Page 106
2.11 Summary......Page 109
2.13 Exercises......Page 110
3.1 Introduction......Page 114
3.2 Multiplexers and Demultiplexers......Page 115
3.3 Decoders and Encoders......Page 120
3.4 Comparators......Page 125
3.5 Adders......Page 126
3.6 Programmable Logic Devices......Page 129
3.7 Arithmetic and Logic Units......Page 134
3.8 Summary......Page 136
3.9 Exercises......Page 138
4.1 Introduction......Page 140
4.2 Clock Signal......Page 142
4.3 Latches......Page 144
4.4 Flip-Flops......Page 147
4.5 Example Sequential Circuits......Page 151
4.6 Sequential Circuit Design......Page 158
4.7 Summary......Page 171
4.8 Exercises......Page 174
PART III: Interconnection......Page 176
5.1 Introduction......Page 178
5.2 Bus Design Issues......Page 181
5.3 Synchronous Bus......Page 184
5.4 Asynchronous Bus......Page 188
5.5 Bus Arbitration......Page 190
5.6 Example Buses......Page 196
5.7 Summary......Page 221
5.9 Exercises......Page 223
PART IV: Processors......Page 226
6 Processor Organization and Performance......Page 228
6.1 Introduction......Page 229
6.2 Number of Addresses......Page 230
6.3 Flow of Control......Page 239
6.4 Instruction Set Design Issues......Page 244
6.5 Microprogrammed Control......Page 250
6.6 Performance......Page 267
6.7 Summary......Page 277
6.8 Exercises......Page 278
7.1 The Pentium Processor Family......Page 282
7.2 The Pentium Processor......Page 284
7.3 The Pentium Registers......Page 287
7.4 Real Mode Memory Architecture......Page 291
7.5 Protected Mode Memory Architecture......Page 296
7.6 Summary......Page 301
7.7 Exercises......Page 302
8 Pipelining and Vector Processing......Page 304
8.1 Basic Concepts......Page 305
8.2 Handling Resource Conflicts......Page 308
8.3 Data Hazards......Page 309
8.4 Handling Branches......Page 313
8.5 Performance Enhancements......Page 317
8.6 Example Implementations......Page 322
8.7 Vector Processors......Page 330
8.8 Performance......Page 343
8.9 Summary......Page 346
8.10 Exercises......Page 348
PART V: Pentium Assembly Language......Page 350
9 Overview of Assembly Language......Page 352
9.2 Assembly Language Statements......Page 353
9.3 Data Allocation......Page 355
9.4 Where Are the Operands?......Page 363
9.5 Data Transfer Instructions......Page 369
9.6 Pentium Assembly Language Instructions......Page 371
9.7 Defining Constants......Page 395
9.8 Macros......Page 397
9.9 Illustrative Examples......Page 399
9.10 Summary......Page 410
9.11 Exercises......Page 411
9.12 Programming Exercises......Page 414
10 Procedures and the Stack......Page 418
10.2 Pentium Implementation of the Stack......Page 419
10.3 Stack Operations......Page 421
10.4 Uses of the Stack......Page 424
10.5 Procedures......Page 425
10.6 Assembler Directives for Procedures......Page 427
10.7 Pentium Instructions for Procedures......Page 428
10.8 Parameter Passing......Page 430
10.9 Handling a Variable Number of Parameters......Page 448
10.10 Local Variables......Page 451
10.11 Multiple Source Program Modules......Page 457
10.12 Summary......Page 461
10.13 Exercises......Page 462
10.14 Programming Exercises......Page 464
11.1 Introduction......Page 466
11.2 Memory Addressing Modes......Page 468
11.3 Illustrative Examples......Page 472
11.4 Arrays......Page 479
11.5 Recursion......Page 486
11.7 Exercises......Page 495
11.8 Programming Exercises......Page 496
12 Selected Pentium Instructions......Page 502
12.1 Status Flags......Page 503
12.2 Arithmetic Instructions......Page 515
12.3 Conditional Execution......Page 528
12.4 Implementing High-Level Language Decision Structures......Page 535
12.5 Logical Expressions in High-Level Languages......Page 541
12.6 Bit Instructions......Page 546
12.7 Illustrative Examples......Page 547
12.8 String Instructions......Page 557
12.9 Summary......Page 573
12.10 Exercises......Page 574
12.11 Programming Exercises......Page 576
13 High-Level Language Interface......Page 582
13.2 Overview......Page 583
13.3 Calling Assembly Procedures from C......Page 585
13.4 Calling C Functions from Assembly......Page 593
13.5 Inline Assembly Code......Page 596
13.6 Summary......Page 597
13.8 Programming Exercises......Page 598
PART VI: RISC Processors......Page 600
14 RISC Processors......Page 602
14.2 Evolution of CISC Processors......Page 603
14.3 RISC Design Principles......Page 606
14.4 PowerPC Processor......Page 609
14.5 Itanium Processor......Page 621
14.6 Summary......Page 642
14.7 Exercises......Page 643
15 MIPS Assembly Language......Page 646
15.1 MIPS Processor Architecture......Page 647
15.2 MIPS Instruction Set......Page 650
15.3 SPIM System Calls......Page 663
15.4 SPIM Assembler Directives......Page 665
15.5 Illustrative Examples......Page 667
15.6 Procedures......Page 674
15.7 Stack Implementation......Page 679
15.8 Summary......Page 688
15.9 Exercises......Page 689
15.10 Programming Exercises......Page 690
PART VII: Memory......Page 694
16 Memory System Design......Page 696
16.2 A Simple Memory Block......Page 697
16.3 Techniques to Connect to a Bus......Page 700
16.4 Building a Memory Block......Page 704
16.5 Building Larger Memories......Page 705
16.6 Mapping Memory......Page 712
16.7 Alignment of Data......Page 714
16.8 Interleaved Memories......Page 715
16.9 Summary......Page 720
16.10 Exercises......Page 721
17 Cache Memory......Page 724
17.1 Introduction......Page 725
17.2 How Cache Memory Works......Page 726
17.3 Why Cache Memory Works......Page 728
17.4 Cache Design Basics......Page 730
17.5 Mapping Function......Page 731
17.6 Replacement Policies......Page 742
17.7 Write Policies......Page 744
17.8 Space Overhead......Page 746
17.9 Mapping Examples......Page 748
17.10 Types of Cache Misses......Page 749
17.11 Types of Caches......Page 750
17.12 Example Implementations......Page 753
17.13 Cache Operation: A Summary......Page 758
17.14 Design Issues......Page 760
17.15 Summary......Page 762
17.16 Exercises......Page 764
18 Virtual Memory......Page 766
18.1 Introduction......Page 767
18.2 Virtual Memory Concepts......Page 768
18.3 Page Table Organization......Page 772
18.4 The Translation Lookaside Buffer......Page 774
18.5 Page Table Placement......Page 775
18.6 Inverted Page Table Organization......Page 777
18.7 Segmentation......Page 779
18.8 Example Implementations......Page 781
18.9 Summary......Page 791
18.10 Exercises......Page 792
PART VIII: Input and Output......Page 796
19 Input/Output Organization......Page 798
19.1 Introduction......Page 799
19.2 Accessing I/O Devices......Page 801
19.3 An Example I/O Device: Keyboard......Page 803
19.4 I/O Data Transfer......Page 805
19.5 Error Detection and Correction......Page 815
19.6 External Interface......Page 822
19.7 Universal Serial Bus......Page 832
19.8 IEEE 1394......Page 841
19.9 The Bus Wars......Page 851
19.10 Summary......Page 852
19.12 Exercises......Page 854
20 Interrupts......Page 856
20.1 Introduction......Page 857
20.2 A Taxonomy of Pentium Interrupts......Page 858
20.3 Pentium Interrupt Processing......Page 860
20.4 Pentium Software Interrupts......Page 862
20.5 Pentium Exceptions......Page 873
20.6 Pentium Hardware Interrupts......Page 878
20.7 Interrupt Processing in the PowerPC......Page 886
20.8 Interrupt Processing in the MIPS......Page 888
20.9 Summary......Page 890
20.10 Exercises......Page 891
20.11 Programming Exercises......Page 893
APPENDICES......Page 894
A.1 Positional Number Systems......Page 896
A.2 Number Systems Conversion......Page 899
A.3 Unsigned Integer Representation......Page 905
A.4 Signed Integer Representation......Page 912
A.5 Floating-Point Representation......Page 918
A.6 Summary......Page 928
A.7 Exercises......Page 929
A.8 Programming Exercises......Page 931
B.1 Character Sets......Page 932
B.3 Unicode......Page 934
B.4 Summary......Page 935
Appendix C: Assembling and Linking Pentium Assembly Language Programs......Page 938
C.1 Structure of Assembly Language Programs......Page 939
C.2 Input/Output Routines......Page 941
C.3 Assembling and Linking......Page 946
C.4 Summary......Page 955
C.6 Programming Exercises......Page 956
Appendix D: Debugging Assembly Language Programs......Page 958
D.1 Strategies to Debug Assembly Language Programs......Page 959
D.2 DEBUG......Page 961
D.3 Turbo Debugger TD......Page 969
D.4 CodeView......Page 974
D.6 Exercises......Page 975
D.7 Programming Exercises......Page 976
Appendix E: Running Pentium Assembly Language Programs on a Linux System......Page 978
E.2 NASM Assembly Language Program Template......Page 979
E.3 Illustrative Examples......Page 981
E.6 Programming Exercises......Page 986
F.1 Testing Digital Logic Circuits......Page 988
F.2 Digital Logic Simulators......Page 989
F.4 Web Resources......Page 997
F.5 Exercises......Page 998
G.1 Introduction......Page 1000
G.2 Simulator Settings......Page 1003
G.3 Running and Debugging a Program......Page 1004
G.6 Programming Exercises......Page 1008
H.1 Introduction......Page 1010
H.2 Registers......Page 1011
H.3 Addressing Modes......Page 1013
H.4 Instruction Set......Page 1015
H.5 Procedures and Parameter Passing......Page 1024
H.8 Exercises......Page 1031
I.1 Pentium Instruction Format......Page 1032
I.2 Selected Pentium Instructions......Page 1035
Bibliography......Page 1064
A......Page 1068
B......Page 1069
C......Page 1070
D......Page 1072
F......Page 1073
I......Page 1074
L......Page 1077
M......Page 1078
N......Page 1080
P......Page 1081
R......Page 1086
S......Page 1087
U......Page 1089
V......Page 1090
Z......Page 1091
