The biannual Formal Methods in Computer Aided Design conference (FMCAD 2000)is the third in a series of conferences under that title devoted to the use of discrete mathematical methods for the analysis of computer hardware and so- ware. The work reported in this book describes the use of modeling languages and their associated automated analysis tools to specify and verify computing systems. Functional veric ation has become one of the principal costs in a modern computer design e ort. In addition,verica tion of circuit models, timing,power, etc., requires even more eo rt. FMCAD provides a venue for academic and - dustrial researchers and practitioners to share their ideas and experiences of using discrete mathematical modeling and veric ation. It is noted with interest by the conference chairmen how this area has grown from just a few people 15 years ago to a vibrant area of research, development, and deployment. It is clear that these methods are helping reduce the cost of designing computing systems. As an example of this potential cost reduction, we have invited David Russino of Advanced Micro Devices, Inc. to describe his veric ation of ?oating-point - gorithms being used in AMD microprocessors. The program includes 30 regular presentations selected from 63 submitted papers.
Author(s): Robert Beers, Rajnish Ghughal, Mark Aagaard (auth.), Warren A. Hunt Jr., Steven D. Johnson (eds.)
Series: Lecture Notes in Computer Science 1954
Edition: 1
Publisher: Springer-Verlag Berlin Heidelberg
Year: 2000
Language: English
Pages: 552
Tags: Computer Hardware; Logics and Meanings of Programs; Mathematical Logic and Formal Languages; Artificial Intelligence (incl. Robotics); Systems and Information Theory in Engineering
Applications of Hierarchical Verification in Model Checking....Pages 1-19
Trends in Computing....Pages 20-21
A Case Study in Formal Verification of Register-Transfer Logic with ACL2: The Floating Point Adder of the AMD Athlon TM Processor....Pages 22-55
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps....Pages 56-73
Automated Refinement Checking for Asynchronous Processes....Pages 74-91
Border-Block Triangular Form and Conjunction Schedule in Image Computation....Pages 92-109
B2M: A Semantic Based Tool for BLIF Hardware Descriptions....Pages 110-126
Checking Safety Properties Using Induction and a SAT-Solver....Pages 127-144
Combining Stream-Based and State-Based Verification Techniques....Pages 145-161
A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles....Pages 162-179
Correctness of Pipelined Machines....Pages 181-198
Do You Trust Your Model Checker?....Pages 199-216
Executable Protocol Specification in ESL....Pages 217-236
Formal Verification of Floating Point Trigonometric Functions....Pages 254-270
Hardware Modeling Using Function Encapsulation....Pages 271-282
A Methodology for the Formal Analysis of Asynchronous Micropipelines....Pages 283-299
A Methodology for Large-Scale Hardware Verification....Pages 300-319
Model Checking Synchronous Timing Diagrams....Pages 320-335
Model Reductions and a Case Study....Pages 336-352
Modeling and Parameters Synthesis for an Air TrafficManagement System....Pages 353-371
Monitor-Based Formal Specification of PCI....Pages 372-390
SAT-Based Image Computation with Application in Reachability Analysis....Pages 391-408
SAT-Based Verification without State Space Traversal....Pages 409-426
Scalable Distributed On-the-Fly Symbolic Model Checking....Pages 427-441
The Semantics of Verilog Using Transition System Combinators....Pages 442-459
Sequential Equivalence Checking by Symbolic Simulation....Pages 460-479
Speeding Up Image Computation by Using RTL Information....Pages 480-491
Symbolic Checking of Signal-Transition Consistency for Verifying High-Level Designs....Pages 492-506
Symbolic Simulation with Approximate Values....Pages 507-522
A Theory of Consistency for Modular Synchronous Systems....Pages 523-541
Verifying Transaction Ordering Properties in Unbounded Bus Networks through Combined Deductive/Algorithmic Methods....Pages 542-556
Visualizing System Factorizations with Behavior Tables....Pages 557-574
