New CAD framework extends simulation of dynamically reconfigurable logic....Pages 1-8
Pebble: A language for parametrised and reconfigurable hardware design....Pages 9-18
Integrated development environment for logic synthesis based on dynamically reconfigurable FPGAs....Pages 19-28
Designing for Xilinx XC6200 FPGAs....Pages 29-38
Perspectives of reconfigurable computing in research, industry and education....Pages 39-48
Field-programmable logic: Catalyst for new computing paradigms....Pages 49-58
Run-time management of dynamically reconfigurable designs....Pages 59-68
Acceleration of satisfiability algorithms by reconfigurable hardware....Pages 69-78
An optimized design flow for fast FPGA-based rapid prototyping....Pages 79-88
A knowledge-based system for prototyping on FPGAs....Pages 89-98
JVX — A rapid prototyping system based on Java and FPGAs....Pages 99-108
Prototyping new ILP architectures using FPGAs....Pages 109-118
CAD system for ASM and FSM synthesis....Pages 119-128
Fast floorplanning for FPGAs....Pages 129-138
SRAM-based FPGAs: A fault model for the configurable logic modules....Pages 139-148
Reconfigurable hardware as shared resource in multipurpose computers....Pages 149-158
Reconfigurable computer array: The bridge between high speed sensors and low speed computing....Pages 159-168
A reconfigurable engine for real-time video processing....Pages 169-178
An FPGA implementation of a magnetic bearing controller for mechatronic applications....Pages 179-188
Exploiting contemporary memory techniques in reconfigurable accelerators....Pages 189-198
Self modifying circuitry — A platform for tractable virtual circuitry....Pages 199-208
REACT: Reactive environment for runtime reconfiguration....Pages 209-217
Evaluation of the XC6200-series architecture for cryptographic applications....Pages 218-227
An FPGA-based object recognition machine....Pages 228-237
PCI-SCI protocol translations: Applying microprogramming concepts to FPGAs....Pages 238-247
Instruction-level parallelism for reconfigurable computing....Pages 248-257
A hardware/software co-design environment for reconfigurable logic systems....Pages 258-267
Mapping loops onto reconfigurable architectures....Pages 268-277
Speed optimization of the ALR circuit using an FPGA with embedded RAM: A design experience....Pages 278-287
High-level synthesis for dynamically reconfigurable hardware/software systems....Pages 288-297
Dynamic specialisation of XC6200 FPGAs by partial evaluation....Pages 298-307
WebScope: A circuit debug tool....Pages 308-315
Computing Goldbach partitions using pseudo-random bit generator operators on an FPGA systolic array....Pages 316-325
Solving boolean satisfiability with dynamic hardware configurations....Pages 326-335
Modular exponent realization on FPGAs....Pages 336-347
Cost effective 2×2 inner product processors....Pages 348-355
A field-programmable gate-array system for evolutionary computation....Pages 356-365
A transmutable telecom system....Pages 366-375
A survey of reconfigurable computing architectures....Pages 376-385
A novel field programmable gate array architecture for high speed arithmetic processing....Pages 386-390
Accelerating DTP with reconfigurable computing engines....Pages 391-395
Hardware mapping of a parallel algorithm for matrix-vector multiplication overlapping communications and computations....Pages 396-400
An interactive datasheet for the xilinx XC6200....Pages 401-405
Fast adaptive image processing in FPGAs using stack filters....Pages 406-410
Increasing microprocessor performance with tightly-coupled reconfigurable logic arrays....Pages 411-415
A high-performance computing module for a low earth orbit satellite using reconfigurable logic....Pages 416-420
Maestro-link: A high performance interconnect for PC cluster....Pages 421-425
A hardware implementation of Constraint Satisfaction Problem based on new reconfigurante LSI architecture....Pages 426-430
A hardware operating system for dynamic reconfiguration of FPGAs....Pages 431-435
High speed low level image processing on FPGAs using distributed arithmetic....Pages 436-440
A flexible implementation of high-performance FIR filters on Xilinx FPGAs....Pages 441-445
Implementing processor arrays on FPGAs....Pages 446-450
Reconfigurable hardware — A study in codesign....Pages 451-455
Statechart-based HW/SW-codesign of a multi-FPGA-board and a microprocessor....Pages 456-460
Simulation of ATM switches using dynamically reconfigurable FPGA's....Pages 461-465
Fast prototyping using system emulators....Pages 466-470
Space-efficient mapping of 2D-DCT onto dynamically configurable coarse-grained architectures....Pages 471-475
XILINX4000 architecture — Driven synthesis for speed....Pages 476-480
The PLD-implementation of Boolean function characterized by minimum delay....Pages 481-484
Reconfigurable PCI-BUS interface (RPCI)....Pages 485-489
Programmable prototyping system for image processing....Pages 490-494
A co-simulation concept for an efficient analysis of complex logic designs....Pages 495-499
Programming and implementation of reconfigurable routers....Pages 500-504
Virtual instruments based on reconfigurable logic....Pages 505-509
The >S<puter: Introducing a novel concept for dispatching instructions using reconfigurable hardware....Pages 510-514
A 6200 model and editor based on object technology....Pages 515-519
Interfacing hardware and software....Pages 520-524
Generating layouts for self-implementing modules....Pages 525-529
