With the semiconductor market growth, new Integrated Circuit designs are pushing the limit of the technology and in some cases, require specific fine-tuning of certain process modules in manufacturing. Thus the communities of design and technology are increasingly intertwined. The issues that require close interactions and collaboration for trade-off and optimization across the design/device/process fields are addressed in Emerging Technologies and Circuits. It contains a set of outstanding papers, keynote and tutorials presented during 3 days at the International Conference On Integrated Circuit Design and Technology (ICICDT) held in June 2008 in Minatec, Grenoble. The selected papers are spread over 5 chapters covering various aspects of emerging technologies and devices, advanced circuit design, reliability, variability issues and solutions, advanced memories and analog and mixed signals. All these papers are focusing on design and technology interactions and comply with the scope of the conference.
Author(s): Michel Brillouët (auth.), Amara Amara, Thomas Ea, Marc Belleville (eds.)
Series: Lecture Notes in Electrical Engineering 66
Edition: 1
Publisher: Springer Netherlands
Year: 2010
Language: English
Pages: 266
Tags: Circuits and Systems; Nanotechnology; Memory Structures
Front Matter....Pages i-ix
Front Matter....Pages 1-1
Synergy Between Design and Technology: A Key Factor in the Evolving Microelectronic Landscape....Pages 3-13
Front Matter....Pages 15-15
New State Variable Opportunities Beyond CMOS: A System Perspective....Pages 17-35
A Simple Compact Model to Analyze the Impact of Ballistic and Quasi-Ballistic Transport on Ring Oscillator Performance....Pages 37-51
Front Matter....Pages 53-53
Low-Voltage Scaled 6T FinFET SRAM Cells....Pages 55-66
Independent-Double-Gate FINFET SRAM Cell for Drastic Leakage Current Reduction....Pages 67-79
Metal Gate Effects on a 32 nm Metal Gate Resistor....Pages 81-93
Front Matter....Pages 95-95
Threshold Voltage Shift Instability Induced by Plasma Charging Damage in MOSFETS with High-K Dielectric....Pages 97-106
Analysis of SI Substrate Damage Induced by Inductively Coupled Plasma Reactor with Various Superposed Bias Frequencies....Pages 107-120
Front Matter....Pages 121-121
CMOS SOI Technology for WPAN: Application to 60 GHZ LNA....Pages 123-130
SRAM Memory Cell Leakage Reduction Design Techniques in 65 nm Low Power PD-SOI CMOS....Pages 131-139
Resilient Circuits for Dynamic Variation Tolerance....Pages 141-161
Process Variability-Induced Timing Failures – A Challenge in Nanometer CMOS Low-Power Design....Pages 163-177
How Does Inverse Temperature Dependence Affect Timing Sign-Off....Pages 179-189
CMOS Logic Gates Leakage Modeling Under Statistical Process Variations....Pages 191-202
On-Chip Circuit Technique for Measuring Jitter and Skew with Picosecond Resolution....Pages 203-217
Front Matter....Pages 219-219
DC–DC Converter Technologies for On-Chip Distributed Power Supply Systems – 3D Stacking and Hybrid Operation....Pages 221-247
Sampled Analog Signal Processing: From Software-Defined to Software Radio....Pages 249-264
