The fact that there are more embedded computers than general-purpose computers and that we are impacted by hundreds of them every day is no longer news. What is news is that their increasing performance requirements, complexity and capabilities demand a new approach to their design. Fisher, Faraboschi, and Young describe a new age of embedded computing design, in which the processor is central, making the approach radically distinct from contemporary practices of embedded systems design. They demonstrate why it is essential to take a computing-centric and system-design approach to the traditional elements of nonprogrammable components, peripherals, interconnects and buses. These elements must be unified in a system design with high-performance processor architectures, microarchitectures and compilers, and with the compilation tools, debuggers and simulators needed for application development. In this landmark text, the authors apply their expertise in highly interdisciplinary hardware/software development and VLIW processors to illustrate this change in embedded computing. VLIW architectures have long been a popular choice in embedded systems design, and while VLIW is a running theme throughout the book, embedded computing is the core topic. Embedded Computing examines both in a book filled with fact and opinion based on the authors many years of R&D experience. · Complemented by a unique, professional-quality embedded tool-chain on the authors' website, http://www.vliw.org/book · Combines technical depth with real-world experience · Comprehensively explains the differences between general purpose computing systems and embedded systems at the hardware, software, tools and operating system levels. · Uses concrete examples to explain and motivate the trade-offs.
Author(s): Joseph A. Fisher, Paolo Faraboschi, Cliff Young
Edition: 1
Publisher: Morgan Kaufmann
Year: 2004
Language: English
Pages: 709
Cover......Page 1
About the Authors......Page 10
Foreword......Page 12
Contents......Page 14
Preface......Page 28
An Introduction to Embedded Processing......Page 38
1.1 What Is Embedded Computing?......Page 40
and General-Purpose Computing......Page 43
1.3 Characterizing Embedded Computing......Page 48
1.4 Embedded Market Structure......Page 60
1.5 Further Reading......Page 75
1.6 Exercises......Page 77
An Overview of VLIW and ILP......Page 82
2.1 Semantics and Parallelism......Page 83
2.2 Design Philosophies......Page 91
2.3 Role of the Compiler......Page 100
2.4 VLIW in the Embedded and DSP Domains......Page 106
2.5 Historical Perspective and Further Reading......Page 108
2.6 Exercises......Page 115
An Overview of ISA Design......Page 120
3.1 Overview: What to Hide......Page 121
3.2 Basic VLIW Design Principles......Page 128
3.3 Designing a VLIW ISA for Embedded Systems......Page 132
3.4 Instruction-set Encoding......Page 138
3.5 VLIW Encoding......Page 149
3.6 Encoding and Instruction-set Extensions......Page 156
3.8 Exercises......Page 158
Architectural Structures in ISA Design......Page 162
4.1 The Datapath......Page 164
4.2 Registers and Clusters......Page 181
4.3 Memory Architecture......Page 188
4.4 Branch Architecture......Page 193
4.5 Speculation and Predication......Page 200
4.6 System Operations......Page 210
4.7 Further Reading......Page 211
4.8 Exercises......Page 212
Microarchitecture Design......Page 216
5.1 Register File Design......Page 219
5.2 Pipeline Design......Page 223
5.3 VLIW Fetch, Sequencing, and Decoding......Page 228
5.4 The Datapath......Page 232
5.5 Memory Architecture......Page 243
5.6 The Control Unit......Page 251
5.8 Power Considerations......Page 258
5.9 Further Reading......Page 262
5.10 Exercises......Page 264
6.1 System-on-a-Chip (SoC)......Page 268
6.2 Processor Cores and SoC......Page 282
6.3 Overview of Simulation......Page 291
6.4 Simulating a VLIW Architecture......Page 294
6.5 System Simulation......Page 308
6.6 Validation and Verification......Page 313
6.7 Further Reading......Page 319
6.8 Exercises......Page 321
7.1 What Is Important in an ILP Compiler?......Page 324
7.2 Embedded Cross-Development Toolchains......Page 327
7.3 Structure of an ILP Compiler......Page 339
7.4 Code Layout......Page 343
7.5 Embedded-Specific Tradeoffs for Compilers......Page 348
7.6 DSP-Specific Compiler Optimizations......Page 357
7.7 Further Reading......Page 369
7.8 Exercises......Page 370
Compiling for VLIWs and ILP......Page 374
8.1 Profiling......Page 375
8.2 Scheduling......Page 380
8.3 Register Allocation......Page 419
8.4 Speculation and Predication......Page 422
8.5 Instruction Selection......Page 427
8.6 Further Reading......Page 428
8.7 Exercises......Page 432
The Run-time System......Page 436
9.1 Exceptions, Interrupts, and Traps......Page 437
9.2 Application Binary Interface Considerations......Page 439
9.3 Code Compression......Page 452
9.4 Embedded Operating Systems......Page 464
9.5 Multiprocessing and Multithreading......Page 475
9.6 Further Reading......Page 477
9.7 Exercises......Page 478
10.1 Programming Language Choices......Page 480
10.2 Performance, Benchmarking, and Tuning......Page 502
10.3 Scalability and Customizability......Page 512
10.4 Further Reading......Page 526
10.5 Exercises......Page 527
11.1 Digital Printing and Imaging......Page 530
11.2 Telecom Applications......Page 542
11.3 Other Application Areas......Page 551
11.4 Further Reading......Page 572
11.5 Exercises......Page 574
The VEX System......Page 576
A.1 The VEX Instruction-set Architecture......Page 577
A.2 The VEX Run-time Architecture......Page 595
A.3 The VEX C Compiler......Page 603
A.4 Visualization Tools......Page 625
A.5 The VEX Simulation System......Page 626
A.6 Customizing the VEX Toolchain......Page 633
A.7 Examples of Tool Usage......Page 636
A.8 Exercises......Page 642
Glossary......Page 644
Bibliography......Page 668
Index......Page 698
