Stamatis Vassiliadis established the SAMOS workshop in the year 2001—an event which combines his devotion to computer engineering and his pride for Samos, the island where he was born. The quiet and inspiring northern mo- tainside of this Mediterranean island together with his enthusiasm and warmth created a unique atmosphere that made this event so successful. Stamatis V- siliadis passed away on Saturday, April 7, 2007. The research community wants to express its gratitude to him for the creation of the SAMOS workshop, which will not be the same without him. We would like to dedicate this proceedings volume to the memory of Stamatis Vassiliadis. The SAMOS workshop is an international gathering of highly quali?ed - searchers from academia and industry, sharing their ideas during a 3-day lively discussion.Theworkshopmeetingisoneoftwocolocatedevents—theotherevent being the IC-SAMOS. The workshop is unique in the sense that not only solved research problems are presented and discussed but also (partly) unsolved pr- lems and in-depth topical reviews can be unleashed in the scienti?c arena. C- sequently, the workshop provides the participants with an environment where collaboration rather than competition is fostered.
Author(s): Willie Anderson (auth.), Stamatis Vassiliadis, Mladen Bereković, Timo D. Hämäläinen (eds.)
Series: Lecture Notes in Computer Science 4599 : Theoretical Computer Science and General Issues
Edition: 1
Publisher: Springer-Verlag Berlin Heidelberg
Year: 2007
Language: English
Pages: 470
Tags: Computer Hardware; Processor Architectures; Computer Communication Networks; System Performance and Evaluation; Computer System Implementation
Front Matter....Pages -
Software Is the Answer But What Is the Question?....Pages 1-1
Integrating VLIW Processors with a Network on Chip....Pages 2-2
Communication Architecture Simulation on the Virtual Synchronization Framework....Pages 3-12
A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems....Pages 13-23
Performance Evaluation of Memory Management Configurations in Linux for an OS-Level Design Space Exploration....Pages 24-33
SC2SCFL: Automated SystemC to $SystemC^{\mathbb{FL}}$ Translation....Pages 34-45
Model and Validation of Block Cleaning Cost for Flash Memory....Pages 46-54
VLSI Architecture for MRF Based Stereo Matching....Pages 55-64
Low-Power Twiddle Factor Unit for FFT Computation....Pages 65-74
Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors....Pages 75-85
An Automatically-Retargetable Time-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code....Pages 86-95
Improving TriMedia Cache Performance by Profile Guided Code Reordering....Pages 96-106
A Streaming Machine Description and Programming Model....Pages 107-116
Mapping and Performance Evaluation for Heterogeneous MP-SoCs Via Packing....Pages 117-126
Strategies for Compiling μ TC to Novel Chip Multiprocessors....Pages 127-138
Image Quantisation on a Massively Parallel Embedded Processor....Pages 139-148
Stream Image Processing on a Dual-Core Embedded System....Pages 149-158
MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing....Pages 159-168
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder....Pages 169-178
Evaluating Large System-on-Chip on Multi-FPGA Platform....Pages 179-189
Efficiency Measures for Multimedia SOCs....Pages 190-199
On-Chip Bus Modeling for Power and Performance Estimation....Pages 200-210
A Framework Introducing Model Reversibility in SoC Design Space Exploration....Pages 211-221
Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration....Pages 222-232
Resource Conflict Detection in Simulation of Function Unit Pipelines....Pages 233-240
A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing....Pages 241-250
High-Bandwidth Address Generation Unit....Pages 251-262
An IP Core for Embedded Java Systems....Pages 263-272
Parallel Memory Architecture for TTA Processor....Pages 273-282
A Linear Complexity Algorithm for the Generation of Multiple Input Single Output Instructions of Variable Size....Pages 283-293
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction....Pages 294-303
A Study of Energy Saving in Customizable Processors....Pages 304-312
Trends in Low Power Handset Software Defined Radio....Pages 313-321
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals....Pages 322-332
Area Efficient Fully Programmable Baseband Processors....Pages 333-342
The Next Generation Challenge for Software Defined Radio....Pages 343-354
Design Methodology for Software Radio Systems....Pages 355-364
Power Efficient Co-simulation Framework for a Wireless Application Using Platform Based SoC....Pages 365-374
A Comparative Study of Different FFT Architectures for Software Defined Radio....Pages 375-384
Design of 100 μW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring....Pages 385-395
Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network....Pages 396-407
System Architecture Modeling of an UWB Receiver for Wireless Sensor Network....Pages 408-420
An Embedded Platform with Duty-Cycled Radio and Processing Subsystems for Wireless Sensor Networks....Pages 421-430
SensorOS: A New Operating System for Time Critical WSN Applications....Pages 431-442
Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks....Pages 443-453
k + Neigh : An Energy Efficient Topology Control for Wireless Sensor Networks....Pages 454-463
Back Matter....Pages -
