Dynamically Reconfigurable Systems is the first ever to focus on the emerging field of Dynamically Reconfigurable Computing Systems. While programmable logic and design-time configurability are well elaborated and covered by various texts, this book presents a unique overview over the state of the art and recent results for dynamic and run-time reconfigurable computing systems.
Dynamically Reconfigurable Systems targets graduate students, researchers and practitioners alike. It is highly recommended as reading material for the advanced graduate level and for researchers starting to explore dynamic and run-time reconfigurable systems.
Reconfigurable hardware is not only of utmost importance for large manufacturers and vendors of microelectronic devices and systems, but also a very attractive technology for smaller and medium-sized companies. Hence, Dynamically Reconfigurable Systems also addresses researchers and engineers actively working in the field and provides them with information on the newest developments and trends in dynamic and run-time reconfigurable systems.
Author(s): Alexander Thomas, Jürgen Becker (auth.), Marco Platzner, Jürgen Teich, Norbert Wehn (eds.)
Edition: 1
Publisher: Springer Netherlands
Year: 2010
Language: English
Pages: 441
Tags: Circuits and Systems; Programming Languages, Compilers, Interpreters; Processor Architectures
Front Matter....Pages I-XXV
Front Matter....Pages 1-1
Development and Synthesis of Adaptive Multi-grained Reconfigurable Hardware Architecture for Dynamic Function Patterns....Pages 3-24
Reconfigurable Components for Application-Specific Processor Architectures....Pages 25-49
Erlangen Slot Machine: An FPGA-Based Dynamically Reconfigurable Computing Platform....Pages 51-71
Front Matter....Pages 73-73
Models and Algorithms for Hyperreconfigurable Hardware....Pages 75-94
Evaluation and Design Methods for Processor-Like Reconfigurable Architectures....Pages 95-116
Adaptive Computing Systems and Their Design Tools....Pages 117-138
PolyDyn —Object-Oriented Modelling and Synthesis Targeting Dynamically Reconfigurable FPGAs....Pages 139-158
Front Matter....Pages 159-159
Design Methods and Tools for Improved Partial Dynamic Reconfiguration....Pages 161-181
Dynamic Partial Reconfiguration by Means of Algorithmic Skeletons—A Case Study....Pages 183-198
ReCoNodes—Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices....Pages 199-221
ReCoNets—Design Methodology for Embedded Systems Consisting of Small Networks of Reconfigurable Nodes and Connections....Pages 223-243
Adaptive Runtime System with Intelligent Allocation of Dynamically Reconfigurable Function Model and Optimized Interface Topologies....Pages 245-267
ReconOS: An Operating System for Dynamically Reconfigurable Hardware....Pages 269-290
Front Matter....Pages 291-291
FlexiChaP: A Dynamically Reconfigurable ASIP for Channel Decoding for Future Mobile Systems....Pages 293-314
Dynamically Reconfigurable Systems for Wireless Sensor Networks....Pages 315-334
DynaCORE—Dynamically Reconfigurable Coprocessor for Network Processors....Pages 335-354
FlexPath NP—Flexible, Dynamically Reconfigurable Processing Paths in Network Processors....Pages 355-374
AutoVision—Reconfigurable Hardware Acceleration for Video-Based Driver Assistance....Pages 375-394
Procedures for Securing ECC Implementations Against Differential Power Analysis Using Reconfigurable Architectures....Pages 395-415
Reconfigurable Controllers—A Mechatronic Systems Approach....Pages 417-436
Back Matter....Pages 437-441
