Dynamic System Reconfiguration in Heterogeneous Platforms defines the MORPHEUS platform that can join the performance density advantage of reconfigurable technologies and the easy control capabilities of general purpose processors. It consists of a System-on-Chip made of a scalable system infrastructure hosting heterogeneous reconfigurable accelerators, providing dynamic reconfiguration capabilities and data-stream management capabilities.
Moreover a toolset which offers a software-oriented approach for implementing data intensive applications on the chip is presented. The toolset provides application design process based on high level programming languages as much as possible.
Various applications from differnt domains have been selected to drive the development of the project in assessing the MORPHEUS concept about its computing performance, utilization flexibility and productivity.
The emerging IEEE 802.16j standard for Mobile Broadband Wireless Access systems is the base for a first type of applications. The second application is in the area of telecommunication networks which requires data rates up to 40 Gbit/s per single line. A third application is about huge digital postprocessing of the films captured by digital camera or film scanners in resolutions up to 4K. The fourth application is about image processing for intelligent cameras.
Author(s): Philippe Bonnot, Alberto Rosti, Fabio Campi, Wolfram Putzke-Röming, Nikolaos S. Voros (auth.), Nikolaos S. Voros, Alberto Rosti, Michael Hübner (eds.)
Series: Lecture notes in electrical engineering 40
Edition: 1
Publisher: Springer Netherlands
Year: 2009
Language: English
Pages: 280
City: Dordrecht; New York
Tags: Circuits and Systems; Special Purpose and Application-Based Systems
Front Matter....Pages i-xxiv
Introduction....Pages 3-11
State of the Art....Pages 13-27
MORPHEUS Architecture Overview....Pages 31-37
Flexeos Embedded FPGA Solution....Pages 39-47
The Dream Digital Signal Processor....Pages 49-61
XPP-III....Pages 63-76
The Hardware Services....Pages 77-91
The MORPHEUS Data Communication and Storage Infrastructure....Pages 93-105
Overall MORPHEUS Toolset Flow....Pages 109-117
The Molen Organisation and Programming Paradigm....Pages 119-127
Control of Dynamic Reconfiguration....Pages 129-137
Specification Tools for Spatial Design....Pages 139-164
Spatial Design....Pages 165-182
Real-Time Digital Film Processing....Pages 185-193
Ethernet Based In-Service Reconfiguration of SoCs in Telecommunication Networks....Pages 195-203
Homeland Security – Image Processing for Intelligent Cameras....Pages 205-215
PHY-Layer of 802.16 Mobile Wireless on a Hardware Accelerated SoC....Pages 217-224
Conclusions....Pages 227-232
Training....Pages 233-249
Dissemination of MORPHEUS Results....Pages 251-259
Exploitation from the MORPHEUS Project....Pages 261-266
Project Management....Pages 267-272
Back Matter....Pages 273-280
