Digital Logic and Microprocessors

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This comprehensive, integrated introduction to digital hardware design features an up-to-date treatment of the fundamentals of logic design, microprocessors, interface design,and assembly language programming. Digital Logic and Microprocessors also includes an introduction to hardware description languages which provides a means of describing more complex sequential circuits and serves as a transition to the discussion of microprocessors. To come to grips with real-world details, the book uses an actual microprocessor (the 6502) as a tool for programming instruction, giving readers experience in those areas vital to system design, including input-output interfacing. The choice of the 6502 makes it possible to illustrate important programming topics with complete routines. Digital Logic and Microprocessors is accessible enough to be understood without prerequisites. This rigorously tested guide presents engineering design topics that can be grasped without a prior background in calculus. As a further aid, numerous completely developed examples appear throughout the book. It therefore can be used by working electrical and computer engineers, students specializing in computer technology or electrical engineering, non-majors with some knowledge of a high-levellanguage, or by any reader with sufficient interest and desire to learn about computer hardware. About the authors: FREDRICK J. HILL is Professor of Electrical and Computer Engineering at the University of Arizona. His industrial experience includes positions in the Computer Aided Design Department of Motorola’s Semiconductor Products Division in Mesa, Arizona; the Electronics Department of the Lawrence Radiation Laboratory in Livermore, California; the Instrumentation and Range Development Office at the U.S. Army Electronic Proving Ground at Fort Huachuca, Arizona; and the Advanced Digital Computer Techniques Section of the U.S. Army Signal Research and Development Laboratory in New Jersey. He is coauthor (with Dr. Peterson) of Introduction to Switching Theory and Logical Design (Wiley, 1968, 1974) and of Digital Systems: Hardware Organization and Design (Wiley, 1973, 1978), and author of numerous articles on digital hardware, computer-aided design, and related topics. Dr. Hill received his PhD in electrical engineering from the University of Utah. GERALD R. PETERSON is Professor of Electrical and Computer Engineering at the University of Arizona. For two years, he served as a consultant on the design of analog computers for Burr-Brown Research Corp. Earlier, he worked for General Electric in electric machinery testing and test equipment design, as well as in field engineering on aircraft armament and control systems. A member of several professional organizations, he is a Senior Member of I.E.E.E. Dr. Peterson is the author of Basic Analog Computation (1967), and the coauthor of Introduction to Switching Theory and Logical Design and of Digital Systems: Hardware Organization and Design. He received his PhD in electrical engineering from the University of Arizona.

Author(s): Fredrick J. Hill; Gerald R. Peterson
Publisher: John Wiley & Sons
Year: 1984

Language: English
Commentary: Ex libris Noitaenola.
Pages: 539

1 Between the Transistor and the High-Level Language
1.1 Prior Perceptions
1.2 A Spectrum of Digital Languages
1.3 Control Flow
1.4 Terms and Roles
1.5 Some Digital History

2 Boolean Algebra and Digital Logic
2.1 Computer Logic Circuits
2.2 Application of Logic Circuits
2.3 Evaluation of Boolean Functions
2.4 Boolean Algebra
2.5 Simplification of Boolean Functions
2.6 Boolean Algebra as an Algebra of Subsets
2.7 On the History of the Algebra of Logic
Problems
References

3 0,1: Binary Numbers or Logical Values?
3.1 The Binary Number System
3.2 Conversion between Bases
3.3 Binary Coding of Decimal Digits
3.4 Historical Note
Problems
References

4 Simplification of Boolean Functions
4.1 Standard Forms of Boolean Functions
4.2 Karnaugh Map Representation of Boolean Functions
4.3 Simplification of Functions on the Karnaugh Map
4.4 Map Minimization of Product-of-Sums Expressions
4.5 Incompletely Specified Functions
Problems
References

5 Standard Digital Integrated Circuits
5.1 Introduction
5.2 Small-Scale Integrated Circuits
5.3 Fan-out, Fan-in, and Noise Immunity
5.4 Switching Delay in Logic Circuits
5.5 Circuit Implementation with NAND and NOR Gates
5.6 Multilevel All-NAND Realizations
5.7 Reducing Package Counts in Multilevel Realizations
Problems
References

6 Computer Arithmetic and Codes
6.1 Introduction
6.2 Conversion between Number Bases
6.3 Coding of Information
6.4 Parity
6.5 Binary Arithmetic
6.6 Implementation of Binary and BCD Addition
6.7 Carry and Overflow
Problems
References

7 Combinational MSI Parts, ROMs, and PLAs
7.1 Perspective
7.2 Combinational MSI Parts
7.3 Read-Only Memory
7.4 Chip-Select, Buses, and Three-State Switches
7.5 Programmed Logic Arrays
7.6 Describing Multiplexers with a Graphic Vector Notation
7.7 Special Purpose MSI Parts
Problems
References

8 Sequential Circuits
8.1 Storage of Information
8.2 Clocking
8.3 Registers
8.4 Memory Element Input Logic
8.5 A First Design Example
8.6 The J-K Flip-Flop
8.7 Design of Counters
8.8 MSI Registers and Counters
Problems
References

9 Synthesis of State Machines
9.1 A Language is Needed
9.2 Standard Symbols for the ASM Chart
9.3 Vending Machine Control
9.4 From ASM Charts to Transition Tables
9.5 Circuit Realization
9.6 The State Diagram, an Alternative Notation
9.7 Compatible States
Problems
References

10 Register Transfer Design
10.1 Generalized ASM Output
10.2 ASM Chart Representation of a Control Unit
10.3 Register Transfer Language (RTL) Notation
10.4 Construction of a Data Unit from an RTL Description
10.5 Timing of Connections and Transfers
10.6 Sequencing of Control
10.7 Combinational Logic and Conditional Transfers
10.8 Graphical and RTL Bus Notation
10.9 Timing Refinements in RTL Systems
10.10 An RTL Design Example
Problems
References

11 Small Computer Organization and Programming
11.1 Introduction
11.2 Central Processor and Memory Organization
11.3 CPU Organization and Instruction Formats
11.4 Fundamental Internal Sequence of a Single-Address Computer
11.5 Transfer-of-Control and Register-Only Instructions
11.6 Addition and Subtraction with Carry
11.7 Commands That Affect Only the Flags
11.8 Programming Procedures
Problems

12 Addressing and Assembly Language
12.1 Microprocessor Addressing
12.2 Addressing Modes
12.3 Assembly Language Programming
12.4 More Programming
12.5 Data Conversion, Decimal Arithmetic, and Subroutines
Problems

13 Memory and Input/Output
13.1 Memory Mapping
13.2 Timing of Memory Operation
13.3 Parallel Input/Output Interfacing
13.4 Interactive Input/Output
13.5 Programming Time Delays
13.6 Device Drivers
13.7 Substituting Input Scanning for Combinational Logic
13.8 Time-Sharing of Interface Ports
Problems
References

14 Serial Input/Output
14.1 Serial to Parallel Conversion
14.2 A Serial Communications Interface Adapter TBSIA
14.3 A Subroutine for Serial I/O through a TBSIA
14.4 Interconnecting RS-232 Equipments
14.5 Computer Networks
Problems
References

15 Additional Programming Topics
15.1 Pointer Addressing and Stacks
15.2 Subroutines
15.3 Interrupts
15.4 Start-up and Reset
15.5 Tables and Other Data Structures
Problems
References

16 Microprocessor-Based Systems Design
16.1 Introduction
16.2 Vending Machine Operation
16.3 System Specifications
16.4 Control Unit Design
16.5 Planning the Program
16.6 Memory Map Layout
16.7 Coding the Program
Problems

17 The Clock-Mode Assumption Reexamined
17.1 Attention to Output Waveforms
17.2 Elimination of Hazards
17.3 Synchronizing Inputs to Clock-Mode Circuits
17.4 Clock Skew on Edge-Triggered Flip-Flops
17.5 Is That Clock Really Necessary?
17.6 Synthesis of Level-Mode Sequential Circuits from a Flow Table
17.7 Races in State Variable Transitions
17.8 Critical Race-Free State Assignments
17.9 More Constraints on Level-Mode Realizations
Problems
References

Appendix A Powers off Two
Appendix B Summary off TB65O2 Instruction Set
Appendix C TB6502 Instruction Set: Opcodes, Bytes, Cycles
Appendix D Mapping the TB6502 into the 6502
Index