Differentiated Layout Styles for MOSFETs: Electrical Behavior in Harsh Environments

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This book describes in detail the semiconductor physics and the effects of the high temperatures and ionizing radiations in the electrical behavior of the Metal-OxideSemiconductor Field Effect Transistors (MOSFETs), implemented with the first and second generations of the differentiated layout styles. The authors demonstrate a variety of innovative layout styles for MOSFETs, enabling readers to design analog and RF MOSFETs that operate in a high-temperature wide range and an ionizing radiation environment with high electrical performance and reduced die area.

Author(s): Salvador Pinillos Gimenez, Egon Henrique Salerno Galembeck
Publisher: Springer
Year: 2023

Language: English
Pages: 215
City: Cham

Contents
Chapter 1: Introduction
References
Chapter 2: Basic Concepts of the Semiconductor Physics
2.1 Classification of the Solid-State Materials
2.2 Energy Bands
2.3 Metals, Insulators, and Semiconductors
2.4 The Distribution of Electrons in a Semiconductor and the Influence of Temperature
2.5 Intrinsic and Extrinsic Semiconductors
2.6 Carrier Transport Phenomena
2.6.1 The Drift Process and Mobility
2.6.2 The Diffusion Process
References
Chapter 3: The Electrical Characteristics of the Semiconductor at High Temperatures
3.1 The Band Gap at Finite Temperature
3.2 Intrinsic Charge Carrier Concentration and Its Variation with the Increasing of the Temperature
3.3 Concentration of the Free Charge Carriers in the Semiconductor as a Function of the Temperature
3.4 Fermi Level Variation with Temperature and Doping
3.5 Electric Mobility
3.6 Impact Ionization Effect
References
Chapter 4: The MOSFET
4.1 Conventional MOSFET
4.1.1 MOS Capacitor
4.1.1.1 Accumulation Mode
4.1.1.2 Depletion Mode
4.1.1.3 Inversion Mode
4.1.2 The Threshold Voltage of MOSFETs
4.2 Operation Regimes of an nMOSFET
4.3 Channel Length Modulation
4.4 Longitudinal Electric Field
References
Chapter 5: The First Generation of the Unconventional Layout Styles for MOSFETs
5.1 Hexagonal (Diamond) Layout Style for MOSFETs
5.1.1 First-Order Analytical Modeling of IDS for DM
5.2 Octagonal Layout Style for MOSFETs
5.2.1 First-Order Analytical Modeling of IDS for OM
5.3 Elipsoidal Layout Style for MOSFETs
5.3.1 First-Order Analytical Modeling of IDS for EM
References
Chapter 6: The Second Generation of the Unconventional Layout Styles (HYBRID) for MOSFETs
6.1 Half-Diamond (Hexagonal) Layout Style for MOSFETs
References
Chapter 7: The Ionizing Radiations Effects in Electrical Parameters and Figures of Merit of Mosfets
7.1 Types of Ionizing Radiations
7.2 Sources of Ionizing Radiations
7.3 X-Rays
7.4 Total Ionizing Dose (TID) Effects in MOSFETs
7.5 TID Effects in the Threshold Voltage
7.6 TID Effects of the Subthreshold Slope
7.7 TID Effects of the Conductance, Transconductance, Transit Time and Response Speed
7.8 TID Effects of the Current Leakage
7.9 Some Ionizing Radiations´ Studies in MOSFETs with Unconventional Gate Geometries Published in the Literature
References
Chapter 8: The High Temperatures´ Effects on the Conventional (Rectangular) and Non-conventional Layout Styles of the First an...
8.1 The High Temperature´s Effects on the Electrical Parameters and Figures of Merit of Conventional MOSFETs
8.1.1 The High Temperatures´ Effects on the Threshold Voltage of the Conventional (Rectangular) MOSFETs
8.1.2 The High Temperatures´ Effects on the Subthreshold Slope of the Conventional MOSFETs
8.1.3 Zero Temperature Coefficient (ZTC)
8.1.4 The High Temperatures´ Effects on the Drain Leakage Current of the Conventional MOSFETs
8.1.5 The High Temperatures´ Effects on the Transconductance of the Conventional n-channel MOSFETs
8.1.6 The High Temperatures´ Effects on the Transconductance Over the Drain Current Ratio of the Conventional MOSFETs
8.1.7 The High Temperatures´ Effects on the Output Conductance and Early Voltage of the Conventional MOSFETs
8.1.8 The High Temperatures´ Effects on the Intrinsic Voltage Gain of the Conventional n-channel MOSFETs
8.1.9 The High Temperatures´ Effects on the Unity Voltage Gain Frequency of the Conventional n-channel MOSFETs
8.2 The High Temperatures´ Effects on the MOSFETs Implemented with the First Generation of the Innovative Layout Styles
8.2.1 The Geometric Characteristics of the MOSFETs Implemented with the Innovative Layout Styles of the First Generation Consi...
8.2.2 The High Temperatures´ Effects on the Threshold Voltages of the MOSFETs Implemented with the Innovative Layout Styles of...
8.2.3 The High Temperatures´ Effects on the Subthreshold Slopes of the MOSFETs Implemented with the Innovative Layout Styles o...
8.2.4 The Zero Temperature Coefficient in the MOSFETs Implemented with the Innovative Layout Styles of the First Generation
8.2.5 The High Temperatures´ Effects on the Analog Electrical Parameters and Figures of Merit of the MOSFETs Implemented with ...
8.2.5.1 The High Temperatures´ Effects on the Drain Leakage Currents of the MOSFETs Implemented with the Innovative Layout Sty...
8.2.5.2 The High Temperatures´ Effects on the Transconductances of the MOSFETs Implemented with the Innovative Layout Styles o...
8.2.5.3 The High Temperatures´ Effects on the gm/IDS Ratios of the MOSFETs Implemented with the Innovative Layout Styles of th...
8.2.5.4 The High Temperatures´ Effects on the Output Conductance and Early Voltage of the n-channel MOSFETs Implemented with t...
8.2.5.5 The High Temperatures´ Effects on the Intrinsic Voltage Gain of the n-channel MOSFETs Implemented with the Innovative ...
8.2.5.6 The High Temperatures´ Effects on the Unity Voltage Gain Frequency of the MOSFETs Implemented with the Innovative Layo...
8.3 The New Effects Identified in MOSFETs Implemented with the Layout Styles of the First Generation
8.4 The High Temperatures´ Effects on MOSFETs Implemented with the First Element of the Layout Styles of the Second Generation...
References
Appendices
Appendix A: The Three-Dimensional Numerical Simulator
A.1 Physical Models Used in the Simulation
A.2 The Structures Created in the Simulator
A.3 Calibration Methodology for Device Simulations
Appendix B: Sentaurus Structure Editor Input Files
B.1 SDE Command File for RM
B.2 SDE Command File for DM
B.3 SDE Command File for OM
B.4 SDE Command File for EM
B.5 SDE Command File for HDM
Appendix C: Sentaurus SDEVICE Input Files
C.1 SDEVICE Command Files for RM
C.2 SDEVICE Command Files for DM
C.3 SDEVICE Command Files for OM
C.4 SDEVICE Command Files for EM
C.5 SDEVICE Command Files for HDM
References
Index