Communications technology at a frequency range into Terahertz (THz) levels has attracted attention because it promises near-fibre-optic-speed wireless links for the 5G and post-5G world. Transmitter and receiver integrated circuits based on CMOS, which has the ability to realize such circuits with low power consumption at a low cost, are expected to become increasingly widespread, with much research into the underlying electronics currently underway.
This book describes recent research on terahertz CMOS design for high-speed wireless communication. The topics covered include fundamental technologies for terahertz CMOS design, amplifier design, physical design approaches, transceiver design, and future prospects. This concise source of key information, written by leading experts in the field, is intended for researchers and professional circuit designers working in RFIC and CMOS design for telecommunications.
Author(s): Minoru Fujishima, Shuhei Amakawa
Series: IET Materials Circuits and Devices Series, 35
Publisher: The Institution of Engineering and Technology
Year: 2019
Language: English
Pages: 198
City: London
Cover
Contents
Preface
1 Introduction
1.1 Terahertz communication
1.2 300-GHz-band wireless that realizes 100 Gbit/s
1.3 Recent progress of terahertz integrated circuits for communications [2]
1.3.1 Review of 300-GHz band wireless communication
1.3.2 300-GHz transmitters and receivers
1.4 Recent progress of terahertz CMOS circuits [23]
1.4.1 Technical background of terahertz CMOS circuit design
1.4.2 Device characterization and modeling
1.4.2.1 De-embedding
1.4.2.2 Electromagnetic field simulation
1.4.2.3 Nonlinear transistor model
1.4.3 Terahertz CMOS building-block design
1.4.3.1 Gain boosting in amplifiers
1.4.3.2 High-frequency generation
1.4.3.3 On-chip power-line decoupling, planar circuits and antennas
1.4.4 Outlook
References
2 Amplifier design
2.1 Amplifier theory
2.1.1 Introduction
2.1.2 Maximum conditionally stable gain
2.1.3 Possible application to amplifier design
2.1.3.1 132-GHz CMOS amplifier
2.1.3.2 60-GHz amplifier design with parameter dispersion
2.1.4 Summary and discussion
2.2 Gain and noise optimization of small-signal amplifier [23]
2.3 Gain-boosting by feedback
2.3.1 Introduction
2.3.2 Gain and stability of feedback amplifier [22]
2.3.3 Gain boosting by lossless reciprocal feedback [22]
2.3.4 Graphical design of feedback network [37]
2.3.5 Gain boosting using leaky tapped transformer
2.4 Compact layout techniques [43], [53]
2.4.1 " Fishbone" layout for single-ended amplifiers
2.4.2 Extension of " fishbone" for differential amplifiers
2.4.3 Design
2.4.3.1 Transmission lines
2.4.3.2 Crosstalk between shunt stubs
2.4.3.3 Capacitive cross-coupling technique
2.4.3.4 Rat-race balun
2.4.3.5 Five-stage differential amplifier
2.4.4 Results and discussion
2.4.5 Conclusion
References
3 Physical design techniques for RF CMOS
3.1 Physical design [1]
3.1.1 Bond-based design
3.1.2 Power-line decoupling
3.2 Measurement and de-embedding
3.2.1 Probing in on-wafer measurement [12]
3.2.2 De-embedding
3.2.2.1 Basic idea of de-embedding
3.2.2.2 Thru–reflect–line (TRL)
3.2.2.3 Multi-line TRL in terahertz [1]
3.2.2.4 Split I for low frequency [19]
3.2.3 Parameter extraction for EM field simulation [1]
3.3 Device modeling
3.3.1 Small-signal equivalent-circuit modeling
3.3.1.1 Small-signal equivalent circuit of integrated-circuit device
3.3.2 MOSFET parasitic resistances at millimeter wave [1]
References
4 Transceiver design
4.1 Transmitter
4.1.1 Architectural consideration [1]
4.1.2 Circuit design [1]
4.1.2.1 Cubic mixer
4.1.2.2 Power splitter
4.1.2.3 Power combiner
4.1.2.4 Overall TX design
4.1.3 Analysis of cubic mixer [1]
4.1.4 Transmitter performance [1]
4.1.5 Doubler-based transmitter [40]
4.1.5.1 Architecture
4.1.5.2 Suppression of unwanted signals
4.1.5.3 Double-rat-race
4.1.5.4 Measurement
4.1.6 Transmitter module [51]
4.1.6.1 Structure of the 300-GHz CMOS transmitter module
4.1.6.2 Measurement results
4.1.6.3 Conclusion
4.2 Receiver
4.2.1 Doubler-last LO driver [45]
4.2.1.1 300 GHz downconversion mixer
4.2.1.2 LO multiplier chain
4.2.1.3 Measurement results
4.2.2 Tripler-last LO driver [42]
4.2.2.1 Measurement results
4.2.3 Summary
4.2.4 Receiver module [48]
4.2.4.1 300-GHz CMOS receiver module
4.2.4.2 Measurement results
4.2.4.3 Conclusion
4.3 One-chip transceiver [53]
4.3.1 Architecture
4.3.2 Transmitter mode
4.3.3 Receiver mode
4.3.4 Schematic
4.3.5 Measurement
4.4 Wireless-link evaluation [25]
4.4.1 Introduction
4.4.2 Wireless performance of 300-GHz CMOS transmitter
4.4.3 Comparison of transmit-receive systems
4.4.4 Conclusion
References
5 Future prospects
5.1 Channel allocation planning for 300-GHz band [8]
5.2 The future of terahertz communication spreading in space [5]
5.3 Summary
5.4 Concluding remarks
References
Index
Back Cover
