CHES2007,theninthworkshoponCryptographicHardwareandEmbeddedS- tems, was sponsored by the International Association for Cryptologic Research (IACR) and held in Vienna, Austria, September 10–13, 2007. The workshop - ceived 99 submissions from 24 countries, of which the Program Committee (39 members from 15 countries) selected 31 for presentation. For the ?rst time in the history of CHES, each submission was reviewed by at least four reviewers instead of three (and at least ?ve for submissions by PC members, those now being limited to two per member) and many submitted papers have received plenty of extra reviews (some papers received up to nine reviews), thus totalling the unprecedented record of 483 reviews overall. Thepaperscollectedinthisvolumerepresentcutting-edgeworldwideresearch in the rapidly evolving ?elds of crypto-hardware, fault-based and side-channel cryptanalysis, and embedded cryptography, at the crossing of academic and - dustrial research. The wide diversity of subjects appearing in these proceedings covers virtually all related areas and shows our e?orts to extend the scope of CHES more than usual. Although a relatively young workshop, CHES is now ?rmlyestablishedasascienti?ceventofreferenceappreciatedbymoreandmore renowned experts of theory and practice: many high-quality works were subm- ted, all of which, sadly, could not be accepted. Selecting from so many good worksis no easy task and our deepest thanks go to the members of the Program Committee for their involvement, excellence, and team spirit. We are grateful to the numerous external reviewers listed below for their expertise and assistance in our deliberations.
Author(s): Josh Jaffe (auth.), Pascal Paillier, Ingrid Verbauwhede (eds.)
Series: Lecture Notes in Computer Science 4727
Edition: 1
Publisher: Springer-Verlag Berlin Heidelberg
Year: 2007
Language: English
Pages: 468
Tags: Data Encryption; Computer Communication Networks; Special Purpose and Application-Based Systems; Logic Design; Operating Systems; Management of Computing and Information Systems
Front Matter....Pages -
A First-Order DPA Attack Against AES in Counter Mode with Unknown Initial Counter....Pages 1-13
Gaussian Mixture Models for Higher-Order Side Channel Analysis....Pages 14-27
Side Channel Cryptanalysis of a Higher Order Masking Scheme....Pages 28-44
High-Speed True Random Number Generation with Logic Gates Only....Pages 45-62
FPGA Intrinsic PUFs and Their Use for IP Protection....Pages 63-80
Evaluation of the Masked Logic Style MDPL on a Prototype Chip....Pages 81-94
Masking and Dual-Rail Logic Don’t Add Up....Pages 95-106
DPA-Resistance Without Routing Constraints?....Pages 107-120
On the Power of Bitslice Implementation on Intel Core2 Processor....Pages 121-134
Highly Regular Right-to-Left Algorithms for Scalar Multiplication....Pages 135-147
MAME: A Compression Function with Reduced Hardware Requirements....Pages 148-165
Collision Attacks on AES-Based MAC: Alpha-MAC....Pages 166-180
Secret External Encodings Do Not Prevent Transient Fault Analysis....Pages 181-194
Two New Techniques of Side-Channel Cryptanalysis....Pages 195-208
AES Encryption Implementation and Analysis on Commodity Graphics Processing Units....Pages 209-226
Multi-gigabit GCM-AES Architecture Optimized for FPGAs....Pages 227-238
Arithmetic Operators for Pairing-Based Cryptography....Pages 239-255
FPGA Design of Self-certified Signature Verification on Koblitz Curves....Pages 256-271
How to Maximize the Potential of FPGA Resources for Modular Exponentiation....Pages 272-288
TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks....Pages 289-302
Power Analysis Resistant AES Implementation with Instruction Set Extensions....Pages 303-319
Power and EM Attacks on Passive $13.56\,\textrm{MHz}$ RFID Devices....Pages 320-333
RFID Noisy Reader How to Prevent from Eavesdropping on the Communication?....Pages 334-345
RF-DNA: Radio-Frequency Certificates of Authenticity....Pages 346-363
CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method....Pages 364-377
Collision Search for Elliptic Curve Discrete Logarithm over GF(2 m ) with FPGA....Pages 378-393
A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations....Pages 394-412
Differential Behavioral Analysis....Pages 413-426
Information Theoretic Evaluation of Side-Channel Resistant Logic Styles....Pages 427-442
On the Implementation of a Fast Prime Generation Algorithm....Pages 443-449
PRESENT: An Ultra-Lightweight Block Cipher....Pages 450-466
Cryptographic Hardware and Embedded Systems - CHES 2007....Pages E1-E1
Back Matter....Pages -
