These are the proceedings of the Eighth Workshop on Cryptographic Hardware and Embedded Systems (CHES 2006) held in Yokohama, Japan, October 10-13, 2006. The CHES workshophas been sponsored by the International Association for Cryptographic Research (IACR) since 2004. The ?rst and the second CHES workshops were held in Worcester in 1999 and 2000, respectively, followed by Paris in 2001, San Francisco Bay Area in 2002, Cologne in 2003, Boston in 2004 and Edinburgh in 2005. This is the ?rst CHES workshop held in Asia. This year,a totalof 112 paper submissionswerereceived.The reviewprocess was therefore a delicate and challenging task for the Program Committee m- bers. Each paper was carefully read by at least three reviewers, and submissions with a Program Committee member as a (co-)author by at least ?ve reviewers. The review process concluded with a two week Web discussion process which resulted in 32 papers being selected for presentation. Unfortunately, there were a number of good papers that could not be included in the program due to a lack of space. We would like to thank all the authors who submitted papers to CHES 2006. In addition to regular presentations, we were very fortunate to have in the programthreeexcellentinvitedtalksgivenbyKazumaroAoki(NTT)on“Integer Factoring Utilizing PC Cluster,” Ari Juels (RSA Labs) on “The Outer Limits of RFID Security” and Ahmad Sadeghi (Ruhr University Bochum) on “Challenges for Trusted Computing.” The program also included a rump session, chaired by Christof Paar, featuring informal presentations on recent results.
Author(s): C. Archambeau, E. Peeters, F. -X. Standaert, J. -J. Quisquater (auth.), Louis Goubin, Mitsuru Matsui (eds.)
Series: Lecture Notes in Computer Science 4249
Edition: 1
Publisher: Springer-Verlag Berlin Heidelberg
Year: 2006
Language: English
Pages: 462
Tags: Data Encryption; Computer Communication Networks; Special Purpose and Application-Based Systems; Logic Design; Operating Systems; Management of Computing and Information Systems
Front Matter....Pages -
Template Attacks in Principal Subspaces....Pages 1-14
Templates vs. Stochastic Methods....Pages 15-29
Towards Security Limits in Side-Channel Attacks....Pages 30-45
HIGHT: A New Block Cipher Suitable for Low-Resource Device....Pages 46-59
Integer Factoring Utilizing PC Cluster....Pages 60-60
Optically Enhanced Position-Locked Power Analysis....Pages 61-75
Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations....Pages 76-90
A Generalized Method of Differential Fault Attack Against AES Cryptosystem....Pages 91-100
Breaking Ciphers with COPACOBANA –A Cost-Optimized Parallel Code Breaker....Pages 101-118
Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware....Pages 119-133
Implementing Cryptographic Pairings on Smartcards....Pages 134-147
SPA-Resistant Scalar Multiplication on Hyperelliptic Curve Cryptosystems Combining Divisor Decomposition Technique and Joint Regular Form....Pages 148-159
Fast Generation of Prime Numbers on Portable Devices: An Update....Pages 160-173
A Proposition for Correlation Power Analysis Enhancement....Pages 174-186
High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching....Pages 187-200
Cache-Collision Timing Attacks Against AES....Pages 201-215
Provably Secure S-Box Implementation Based on Fourier Transform....Pages 216-230
The Outer Limits of RFID Security....Pages 231-231
Three-Phase Dual-Rail Pre-charge Logic....Pages 232-241
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage....Pages 242-254
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style....Pages 255-269
Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors....Pages 270-284
NanoCMOS-Molecular Realization of Rijndael....Pages 285-297
Improving SHA-2 Hardware Implementations....Pages 298-310
Offline Hardware/Software Authentication for Reconfigurable Platforms....Pages 311-323
Why One Should Also Secure RSA Public Key Elements....Pages 324-338
Power Attack on Small RSA Public Exponent....Pages 339-353
Unified Point Addition Formulæ and Side-Channel Attacks....Pages 354-368
Read-Proof Hardware from Protective Coatings....Pages 369-383
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits....Pages 384-398
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks....Pages 399-413
Challenges for Trusted Computing....Pages 414-414
Superscalar Coprocessor for High-Speed Curve-Based Cryptography....Pages 415-429
Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller....Pages 430-444
FPGA Implementation of Point Multiplication on Koblitz Curves Using Kleinian Integers....Pages 445-459
Back Matter....Pages -
