This volume constitutes the refereed proceedings of the Third International Conference on Contemporary Computing, IC3 2010, held in Noida, India, in August 2010.
Author(s): Sanjay Ranka, Arunava Banerjee, Kanad Kishore Biswas, Sumeet Dua, Prabhat Mishra, Rajat Moona, Sheung-Hung Poon, Cho-Li Wang
Edition: 1st Edition.
Year: 2010
Language: English
Pages: 299
Cover......Page 1
Communications in Computer and Information Science 95......Page 2
Contemporary Computing: Third International Conference, IC3 2010 / Noida, India, August 9-11, 2010 / Proceedings, Part II......Page 3
Copyright......Page 4
Preface......Page 5
Organization......Page 6
Table of Contents – Part II......Page 14
Table of Contents – Part I......Page 17
Introduction......Page 22
The Data Flow Analysis Technique......Page 23
The Principles of Genetic Algorithm(GA)......Page 26
Particle Swarm Optimization(PSO)......Page 27
Comparison between GA and PSO......Page 29
Simulation Results......Page 30
Comparison with Related Work......Page 31
Conclusion and Future Work......Page 32
Introduction......Page 34
Standard Text Compression......Page 35
DNA Compression......Page 36
Overview of the Method......Page 37
Word Based Tagged Code......Page 38
Encoding Algorithm......Page 39
Empirical Results......Page 40
Conclusions......Page 41
References......Page 42
Introduction......Page 44
Related Work......Page 45
Maximum Utility Meta-Scheduling......Page 47
Experimental Results......Page 49
Architecture of EcoGrid......Page 50
Experimental Setup and Analysis of Results......Page 51
A Hierarchical Decentralized Scheduling Framework......Page 53
References......Page 54
Introduction......Page 55
Encoder Workload......Page 56
Introduction to CUDA Hardware Architecture......Page 57
Parallelization......Page 59
EBCOT......Page 60
Results......Page 63
References......Page 64
Introduction......Page 67
Related Work......Page 68
Modeling Event Interactions Using Event Operators......Page 69
Formal Definition of Event-Flow Model......Page 70
Generating Event-Flow Complexity Metric from Event-Flow Model......Page 72
Event Interdependency Matrices......Page 73
Definitions and Measurement of Event-Flow Complexity Metric......Page 74
Utility of Event-Flow Complexity Metric......Page 75
Application and Validation of Event-Based Complexity Metric......Page 76
Event-Interdependency Matrix......Page 77
Validation of Event-Flow Complexity Metric......Page 78
Conclusion......Page 80
References......Page 81
Introduction......Page 83
Simple Earliest Deadline First Scheduler (SEDF)......Page 84
Requirement of Global Load Balancing......Page 86
Description......Page 87
Algorithm......Page 88
Load Balancing Parameters......Page 89
References......Page 90
Introduction......Page 92
Previous Work......Page 93
Wireless Sensor Network-Tier I......Page 94
Telemetry System......Page 97
Wireless Energy Transfer......Page 98
The Base Station-Tier III......Page 99
Video Receiver......Page 100
Simulation Results......Page 101
References......Page 103
Introduction......Page 105
Related Work......Page 106
System Model for Proposed Handover Scheme (CSHS)......Page 107
Proposed Handover Scheme (CSHS)......Page 110
Performance Evaluation......Page 111
References......Page 115
Introduction......Page 117
Prior Work......Page 118
Memory Built in Self Test......Page 119
Fault models and Memory Test Algorithms......Page 120
Simulation Result......Page 124
References......Page 127
Introduction......Page 129
Relationship Graphs Representation......Page 130
Graph Decomposition Algorithm......Page 132
Design Pattern Detection as Façade Design Pattern......Page 134
Design Pattern Detection as Strategy Design Pattern......Page 136
Design Pattern Detection as Strategy Design Pattern......Page 137
Particular Design Pattern May or May Not Exist......Page 138
References......Page 139
Introduction......Page 141
x86 Memory Management......Page 143
Related Work......Page 144
Generic Decryption......Page 145
Choice of Emulator......Page 146
Implementation......Page 147
Results and Discussion......Page 148
Conclusion......Page 149
References......Page 150
Introduction......Page 152
Related Works......Page 154
Weight and Node Faults......Page 155
Fault Metric......Page 156
Experiments and Results......Page 157
References......Page 160
Introduction......Page 163
Problems and Issues Relating to Interoperability in Context of UML Tools......Page 164
Use of Different Version of UML......Page 166
Different Methods for Representing a XMI Tag......Page 167
Process to Identify Information Loss during Interconversion......Page 168
Process to Manage Information Loss during Interconversion......Page 170
Results......Page 172
References......Page 174
Introduction......Page 176
Related Work......Page 177
Classification and Critical Review of Existing Approaches......Page 178
Classification of Existing Approaches......Page 179
Critical Review......Page 180
Integrated Approach to Automatic Test Case Generation......Page 181
Detailed Explanation of Each Step......Page 182
Application of Methodology......Page 184
References......Page 187
Introduction......Page 189
System Architecture......Page 191
BSN Communication......Page 193
Arrhythmia Detection......Page 197
Simulation Model......Page 198
References......Page 200
Intorduction......Page 202
Feedback and Control System......Page 204
Software Test Process Modeling with State Variables......Page 205
Effect of Parameter on STP......Page 208
Conclusion and Future Work......Page 212
References......Page 213
Introduction......Page 214
ILMT Project: Its Assumptions and Guidelines......Page 215
NLP Applications vs. Conventional Software Applications......Page 216
The ILMT System: Architectural Framework and Development Infrastructure......Page 217
The ILMT Systems: Field Deployable and Maintainable Products......Page 218
The Symbiotic Software Re-engineering Paradigm for Productizing ILMT Systems......Page 219
Module Re-engineering Tasks......Page 220
Practical Measures Followed in Modules Re-engineering, Validation, and for ILMT Evaluation......Page 222
Experiences of Re-engineering ILMT Systems in Symbiotic Mode......Page 223
References......Page 225
Introduction......Page 226
Related Previous Work......Page 228
The Transmit Power Control Problem......Page 229
To Increase Network Capacity It Is Optimal to Reduce the Transmit Power Level......Page 230
The Impact of Power Control on Total Energy Consumption Depends on the Energy Consumption Pattern of the Hardware......Page 231
Design Principles for Power Control......Page 232
Performance Evaluation Clusters......Page 233
Conclusion......Page 235
References......Page 236
Introduction......Page 238
Predicate Hierarchy Graph (PHG)......Page 239
Conclusion and Discussion......Page 248
References......Page 249
Introduction......Page 251
Sample......Page 252
AODV......Page 253
Analysis of Mobility Models......Page 254
Results of Mobility Model Analysis......Page 255
Results and Discussion......Page 256
Conclusion......Page 259
References......Page 260
Introduction......Page 262
FPGA Controller......Page 263
Data Controller......Page 266
Data Path......Page 267
Interfacing of H-Bridge Driver and DC Motor......Page 268
Interfacing of DC Motor and Rotary Encoder......Page 269
Robot Arm......Page 270
Conclusion and Future Work......Page 271
References......Page 272
Introduction......Page 273
Registration Phase......Page 274
Impersonation Attack via Registered Identity......Page 275
Collusion Attack......Page 276
Replay Attack......Page 277
Off-Line Password Guessing Attack......Page 278
Conclusion......Page 279
Introduction......Page 281
Single Dispatch......Page 283
Techniques and Implementation......Page 284
Double Dispatch......Page 285
Using Run-Time Type Information (RTTI)......Page 286
Reflection......Page 288
Design and Implementation of the Preprocessor......Page 289
Steps of the Preprocessing......Page 290
References......Page 291
Author Index......Page 293