CMOS Processors and Memories

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CMOS Processors and Memories addresses the-state-of-the-art in integrated circuit design in the context of emerging computing systems. New design opportunities in memories and processor are discussed. Emerging materials that can take system performance beyond standard CMOS, like carbon nanotubes, graphene, ferroelectrics and tunnel junctions are explored.

CMOS Processors and Memories is divided into two parts: processors and memories. In the first part we start with high performance, low power processor design, followed by a chapter on multi-core processing. They both represent state-of-the-art concepts in current computing industry. The third chapter deals with asynchronous design that still carries lots of promise for future computing needs. At the end we present a “hardware design space exploration” methodology for implementing and analyzing the hardware for the Bayesian inference framework. This particular methodology involves: analyzing the computational cost and exploring candidate hardware components, proposing various custom architectures using both traditional CMOS and hybrid nanotechnology CMOL. The first part concludes with hybrid CMOS-Nano architectures.

The second, memory part covers state-of-the-art SRAM, DRAM, and flash memories as well as emerging device concepts. Semiconductor memory is a good example of the full custom design that applies various analog and logic circuits to utilize the memory cell’s device physics. Critical physical effects that include tunneling, hot electron injection, charge trapping (Flash memory) are discussed in detail. Emerging memories like FRAM, PRAM and ReRAM that depend on magnetization, electron spin alignment, ferroelectric effect, built-in potential well, quantum effects, and thermal melting are also described.

CMOS Processors and Memories is a must for anyone serious about circuit design for future computing technologies. The book is written by top notch international experts in industry and academia. It can be used in graduate course curriculum.

Author(s): Umesh Gajanan Nawathe (auth.), Krzysztof Iniewski (eds.)
Series: Analog Circuits and Signal Processing
Edition: 1
Publisher: Springer Netherlands
Year: 2010

Language: English
Pages: 382
Tags: Circuits and Systems; Solid State Physics; Nanotechnology and Microengineering

Front Matter....Pages i-vi
Front Matter....Pages 1-1
Design of High Performance Low Power Microprocessors....Pages 3-27
Towards High-Performance and Energy-Efficient Multi-core Processors....Pages 29-51
Low Power Asynchronous Circuit Design: An FFT/IFFT Processor....Pages 53-95
CMOL/CMOS Implementations of Bayesian Inference Engine: Digital and Mixed-Signal Architectures and Performance/Price – A Hardware Design Space Exploration....Pages 97-138
A Hybrid CMOS-Nano FPGA Based on Majority Logic: From Devices to Architecture....Pages 139-161
Front Matter....Pages 163-163
Memory Systems for Nano-computer....Pages 165-196
Flash Memory....Pages 197-232
CMOS-based Spin-Transfer Torque Magnetic Random Access Memory (ST–MRAM)....Pages 233-252
Magnetization Switching in Spin Torque Random Access Memory: Challenges and Opportunities....Pages 253-294
High Performance Embedded Dynamic Random Access Memory in Nano-Scale Technologies....Pages 295-336
Timing Circuit Design in High Performance DRAM....Pages 337-360
Overview and Scaling Prospect of Ferroelectric Memories....Pages 361-380