Advances in Semiconductor Technologies: Selected Topics Beyond Conventional CMOS

Cover
Title Page
Copyright
Contents
Preface
List of Contributors
Chapter 1 Heterogeneous Integration at Scale
1.1 Introduction
1.2 Technology Aspects of Heterogeneous Integration
1.2.1 Interconnect Pitch
1.2.2 Substrate Material
1.2.3 Inter‐Die Spacing
1.2.4 Die Size Considerations
1.2.5 Dielet to Substrate Pitch Considerations
1.2.6 Backward Compatibility
1.3 Design and Architecture of Heterogeneous Integration Platforms
1.3.1 Power Delivery and Thermal Management
1.3.2 Floorplanning
1.3.3 Communication
1.4 Reliability of Heterogeneous Integration Systems
1.5 Application Space of Heterogeneous Integration
1.6 Future of Heterogeneous Integration
1.7 Summary
References
Chapter 2 Hyperdimensional Computing: An Algebra for Computing with Vectors
2.1 Introduction
2.2 Overview: Three Examples
2.2.1 Binding and Releasing with Multiplication
2.2.2 Superposing with Addition
2.2.3 Sequences with Permutation
2.3 Operations on Vectors
2.4 Data Structures
2.5 Vector Sums Encode Probabilities
2.6 Decoding a Product
2.7 High‐Dimensional Vectors at Large
2.8 Memory for High‐Dimensional Vectors
2.9 Outline of Systems for Autonomous Learning
2.10 Energy‐Efficiency
2.11 Discussion and Future Directions
References
Chapter 3 CAD for Analog/Mixed‐Signal Integrated Circuits
3.1 Introduction
3.2 Front‐End CAD
3.2.1 Circuit Architecture and Topology Design Space Exploration
3.2.2 Device Sizing
3.2.2.1 AMS Circuit Sizing: Problem Formulation
3.2.2.2 Methods for AMS Circuit Sizing
3.3 Layout Automation
3.3.1 Procedural Layout Generation
3.3.2 Optimization‐Based Layout Synthesis
3.4 Post‐Layout Extraction and Verification
3.5 Conclusion
Acknowledgments
References
Chapter 4 Magnetoelectric Transistor Devices and Circuits with Steering Logic
4.1 Introduction
4.2 Simple Logic Functions with the MEFET “Steering Logic”
4.3 Logic Functions – Majority Gate
4.4 The Full Adder and the Dual XOR (Sum) Gates
4.5 Latch and Memory
4.6 The JK Master–Slave Flip‐Flop
4.7 Conclusion
Acknowledgments
References
Chapter 5 Nonvolatile Memory Based Architectures Using Magnetoelectric FETs
5.1 Introduction
5.2 Magnetoelectric Field Effect Transistor (MEFET)
5.3 1T‐1M Memory Design Based on the MEFET
5.3.1 Read Operation
5.3.2 Write Operation
5.4 2T‐1M Memory Design Based on the MEFET
5.4.1 Read Operation
5.4.2 Write Operation
5.5 MEFET Steering Memory
5.6 Evaluation
5.6.1 Comparative Read Time
5.6.2 Comparative Write Time
5.6.3 Comparison of Cell Areas
5.7 Conclusion
Acknowledgments
References
Chapter 6 Organic Electronics
6.1 Introduction
6.2 Organic Light‐Emitting Diodes
6.3 Organic Solar Cells
6.4 Organic Thin‐Film Transistors
6.5 Outlook
References
Chapter 7 Active‐Matrix Electroluminescent Displays
7.1 Introduction
7.2 Light‐Emitting Diodes for Displays
7.2.1 Thermally Evaporated OLEDs
7.2.2 Realization of Full Color Displays
7.2.3 Printed Displays
7.2.4 Micro‐LED
7.3 TFT Backplanes
7.4 Driving Schemes and Pixel Circuits
7.4.1 Analog Driving
7.4.2 Compensation for Voltage Programming
7.4.2.1 Internal Compensation
7.4.2.2 External Compensation
7.4.3 Digital Driving
7.4.4 Hybrid Driving
7.5 Conclusion
References
Chapter 8 Organic and Macromolecular Memory – Nanocomposite Bistable Memory Devices
8.1 Introduction
8.1.1 What Is an Electronic Memory Device?
8.2 Organic Memory and Its Evolution
8.2.1 Molecular Memory
8.2.2 Polymer Memory Devices
8.3 Summary
Acknowledgment
References
Further Reading/Resources
Related Articles (See Also)
Chapter 9 Next Generation of High‐Performance Printed Flexible Electronics
9.1 Introduction
9.2 Printing Technologies
9.3 High‐Performance Printed Devices and Circuits Using Nano‐to‐Chip Scale Structures
9.3.1 Nanoscale Structures
9.3.2 Microscale Structures
9.3.3 Chip‐Scale (or Macroscale) Structures
9.4 Challenges and Future Directions
9.4.1 Integration of Nano‐to‐Chip Scale Structures
9.4.2 Technological Challenges
9.4.3 Robustness
9.4.4 Disposability
9.4.5 Modeling for Flexible Electronics
9.4.6 Power Consumption
9.5 Summary
References
Chapter 10 Hybrid Systems‐in‐Foil
10.1 Introduction
10.1.1 System‐Level Concept
10.2 Emerging Applications
10.2.1 Smart Labels for Logistics Tracking
10.2.2 Electronic Skin
10.2.2.1 E‐Skin with Embedded AI
10.2.3 Biomedical
10.3 Integration Technologies
10.3.1 Substrate and Interconnect Materials
10.3.2 Flex‐PCB
10.3.3 Wafer‐Based Processing
10.3.3.1 ChipFilm Patch
10.3.4 Challenges
10.3.4.1 Surface Topography
10.3.4.2 Thermal Stress
10.3.4.3 Assembly and Positioning Errors
10.4 State‐of‐the‐Art Components
10.4.1 Active Electronics
10.4.1.1 Microcontrollers
10.4.1.2 Sensor Frontends
10.4.1.3 Sensor Addressing and Multiplexing
10.4.2 Passive Components and Sensors
10.4.2.1 Flexible Antennas
10.4.2.2 HySiF‐Compatible Sensors
10.5 HySiF Testing
10.6 Conclusion and Future Directions
References
Chapter 11 Optical Detectors
11.1 Introduction
11.2 Si Photodiodes Designed in CMOS
11.3 Ultraviolet Photodetectors
11.4 Infrared Optical Detectors
11.4.1 Detectors for Photonic Integrated Circuits
11.4.2 Infrared Photoconductive Detectors
11.4.3 Thermal Infrared Detectors
11.5 Emerging Devices
11.6 Concluding Remarks
References
Chapter 12 Environmental Sensing
12.1 Motivation
12.1.1 Air Pollution
12.1.2 Hazardous Pollutants
12.1.3 Air Quality Index
12.1.4 Air Monitoring Network
12.1.5 Hand‐Held Devices
12.2 Particulate Matter (PM) Sensing
12.2.1 Particulate Matter (PM)
12.2.2 Sensing Mechanisms
12.2.3 Optical Particle Counter (OPC)
12.2.4 Particle Size Distributions
12.2.5 Miniaturized Optical PM Sensing
12.3 Volatile Organic Compounds (VOCs) Sensing
12.3.1 Volatile Organic Compounds (VOCs)
12.3.2 Sensing Mechanisms
12.3.3 MOX‐Based Sensors
References
Chapter 13 Insulated Gate Bipolar Transistors (IGBTs)
13.1 Introduction
13.2 State‐of‐the‐Art IGBT Technology
13.2.1 Structural Basics with Respect to Blocking, ON State and Switching
13.2.2 Cell and Vertical Design
13.2.3 Wafer Technology
13.2.4 Reverse‐Blocking and Reverse‐Conducting IGBTs
13.2.5 Increasing Maximum Junction Temperature
13.2.6 Assembly and Interconnect Technology
13.2.7 Power Density Increase
13.3 Future Prospect of IGBT
13.3.1 Application Requirement Aspects
13.3.2 Next Generation Cell Design Including Gate Driving Schemes
13.3.3 Next Generation Vertical Structure Concepts
13.3.4 Next Level of Thermal Management and Interconnect Technique Innovation
13.4 Outlook
Acknowledgment
References
Chapter 14 III–V and Wide Bandgap
14.1 Introduction
14.2 Diamond Power Devices
14.3 SiC Power Devices
14.4 GaN Power Devices
14.5 Wide Bandgaps for High‐Temperature Applications
14.6 Conclusion
References
Chapter 15 SiC MOSFETs
15.1 Introduction to Silicon Carbide for Power Semiconductors
15.2 SiC Schottky Barrier Diodes
15.3 SiC Transistors
15.4 SiC Power MOSFETs
15.4.1 Possible Cell Concepts
15.4.2 SiC MOS Channel Challenges
15.4.3 Typical MOSFET Device Characteristics – Static Behavior, Switching Performance, and Body Diode Aspects
15.4.4 Gate‐Oxide Reliability Aspects
15.4.5 Short‐Circuit Aspects and Avalanche Ruggedness of SiC MOSFETs
15.5 SiC MOSFETs in Power Applications – Selected Aspects and Prospects
References
Chapter 16 Multiphase VRM and Power Stage Evolution
16.1 Evolution of the First Multiphase Controllers
16.2 Transition from VRMs to “Down” Solutions
16.3 Intel Xeon Generations Challenges Moore's Law
16.4 Increased System Digitization Enables Digital Control
16.5 DrMOS 1.0: Driver + MOSFETs
16.6 DrMOS 4.0 and International Rectifier's Power Stage Alternative
16.7 International Rectifier's “Smart” Power Stage
16.8 DrMOS 5 × 5 mm and 4 × 4 mm De‐standardization
16.9 5 × 6 mm Smart Power Stage: Industry Driven Standardization
16.10 Latest SPS Activities
16.11 Trending Back to VRMs
16.12 Summary
References
Index
EULA