Model order reduction (MOR) techniques are important in reducing the complexity of nanometer VLSI designs, and consequently controlling “parasitic” electromagnetic effects, so that higher operating speeds and smaller feature sizes can be achieved. This book presents a systematic introduction to, and treatment of, the key MOR methods used in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm.
Author(s): Sheldon Tan, Lei He
Publisher: Cambridge University Press
Year: 2007
Language: English
Pages: 240
Cover......Page 1
Half-title......Page 3
Title......Page 5
Copyright......Page 6
Contents......Page 7
Figures......Page 10
Tables......Page 16
Foreword......Page 17
Acknowledgments......Page 19
1.1 The need for compact modeling of interconnects......Page 21
1.2 Interconnect analysis and modeling methods in a nutshell......Page 22
1.3 Book outline......Page 24
1.4 Summary......Page 27
2.1.1 Concept of moments......Page 28
2.1.2 Elmore delay......Page 29
2.2.1 Recursive moment computation......Page 31
2.3.1 Pade approximation......Page 33
2.3.2 Partial fraction decomposition and time-domain response......Page 34
2.3.3 Derivation of poles and residues......Page 35
2.3.4 Multi-node moment matching (MMM)......Page 37
2.3.5 Projection-based methods for pole computation......Page 38
2.4.1 Framework of projection-based model order reduction......Page 40
Concept of Krylov subspaces......Page 42
Moment connection of Krylov subspaces......Page 43
2.4.3 Arnoldi algorithms......Page 45
2.4.4 Lanczos algorithms......Page 46
2.4.5 RLC circuit formulation for reduction......Page 47
2.4.6 Passivity preservation......Page 48
2.4.7 PRIMA algorithm......Page 50
2.6 Historical notes......Page 52
2.8 Appendices......Page 54
3.1 Introduction......Page 57
3.3 Proper orthogonal decomposition (POD)......Page 58
3.4 Classic truncated balanced realization methods......Page 59
3.4.2 Basic idea of balanced truncation......Page 60
3.4.3 Error bounds......Page 62
3.5.3 Lur'e equations......Page 63
3.5.5 Passivity-preserving truncated balanced realization......Page 64
3.7 Empirical TBR and poor man's TBR......Page 65
3.7.1 Poor man's TBR......Page 66
3.8.1 Standard TBR methods......Page 67
3.9.1 Model reduction of unstable systems......Page 68
3.9.2 Generalized eigenproblem method for AREs......Page 70
3.10 Numerical examples......Page 73
3.11 Summary......Page 74
4.1 Introduction......Page 76
4.2.1 Generalized balanced truncation by projection......Page 77
4.2.3 Comparison with PR-TBR......Page 79
4.3.1 Structure-preserved balanced truncation......Page 80
4.4.1 The accuracy of PriTBR......Page 82
4.4.3 The numerical stability and accuracy of reduced model by PriTBR......Page 83
4.5 Summary......Page 84
5 Passive hierarchical model order reduction......Page 87
5.1.1 Review of hierarchical subcircuit reduction......Page 88
5.2.1 Determinant decision diagram......Page 90
5.2.2 DDD representation for hierarchical subcircuit decomposition......Page 92
5.2.3 Y-expanded DDDs......Page 93
5.2.4 Overview of passive hierarchical model order reduction (HMOR) method......Page 95
5.3.1 moment-matching connection......Page 96
5.3.2 Numerical stability of the hierarchical reduction......Page 98
5.4 Preservation of reciprocity......Page 100
5.5.1 Multi-point expansion in hierarchical reduction......Page 101
5.5.2 Explicit waveform-matching algorithm......Page 102
5.5.3 Multi-point expansion for MIMO system reduction......Page 103
5.6.2 Comparison with common-pole matching method in frequency domain......Page 104
5.6.3 Time-domain simulation of an LC oscillator......Page 105
5.6.4 Multi-port macro-model of coupled transmission line......Page 106
5.6.5 Scalability comparison with existing methods......Page 108
5.8 Historical notes on node-elimination-based reduction methods......Page 111
6 Terminal reduction of linear dynamic circuits......Page 113
6.1 Review of the SVDMOR method......Page 115
6.2 Input and output moment matrices......Page 116
6.3.1 The ESVDMOR terminal reduction algorithm......Page 119
6.3.3 Numerical examples for ESVDMOR method......Page 121
6.4 Determination of cluster number by SVD......Page 122
6.5 K-means clustering algorithm......Page 124
6.6.1 TermMerg algorithm flow......Page 126
6.6.2 Modeling flow based on combined terminal and model order reduction......Page 127
6.6.3 Practical implementation and consideration......Page 128
6.6.4 Passivity analysis......Page 129
6.7.1 Comparison with the SVDMOR method......Page 131
6.7.2 Clustering results......Page 132
6.8 Summary......Page 136
7 Vector-potential equivalent circuit for inductance modeling......Page 138
7.1 Vector-potential equivalent circuit......Page 139
7.2 VPEC via PEEC inversion......Page 144
7.2.1 Magnetic energy in the VPEC model......Page 145
7.2.2 Property of G matrix......Page 146
Geometrical truncation......Page 148
Numerical truncation......Page 150
7.4.1 Inductance formulation by nodal analysis......Page 151
7.4.2 Inductance formulation by VPEC model......Page 154
7.5 Summary......Page 156
8.1 Introduction......Page 157
8.2 Chapter overview......Page 158
8.3.1 Grimme's moment-matching theorem......Page 159
8.3.2 Moment matching of output response......Page 160
8.4.1 SPRIM method......Page 161
8.4.2 Block structured projection......Page 162
Clustering......Page 164
Triangularization......Page 166
mq-pole matching......Page 167
8.6 Two-level analysis......Page 169
8.7 Numerical examples......Page 171
8.7.1 A non-uniform structured RC mesh......Page 172
8.7.2 Scalability study......Page 173
8.7.3 Noise map for structured P/G grids......Page 176
8.8 Summary......Page 177
9.1 Introduction......Page 178
9.2.1 Preliminary......Page 179
9.2.2 The SPRIM Method......Page 180
9.3.1 Circuit structure partitioning......Page 181
9.3.2 Re-orthonormalization of split projection matrix......Page 182
9.4 General block structure-preserving MOR method......Page 183
9.4.1 Block structure-preserving MOR for impedance function matrices......Page 184
9.4.2 Localized moment-matching concept......Page 185
9.4.3 Block structure-preserving MOR for admittance-function matrices......Page 186
9.5.1 Comparison results for circuits in impedance forms......Page 187
9.5.2 Comparison results for circuits in admittance forms......Page 188
9.6 Summary......Page 189
9.7 Appendix......Page 190
10.1 Passivity enforcement......Page 192
10.1.1 State-space model representation of Y(s)......Page 193
10.1.2 Passivity-enforcement optimization......Page 194
10.2.1 Introduction......Page 196
10.2.2 The new modeling method......Page 197
10.3 Optimization for magnitude and phase responses......Page 198
10.3.1 Constrained least-square-based optimization......Page 199
10.4 Numerical examples......Page 201
10.5 Summary......Page 205
11.1 Review of existing circuit-realization methods......Page 207
Positive real function revisited......Page 208
General one-port network realization steps......Page 209
11.1.2 One-port realization by Brune's method......Page 211
11.2.1 General relaxed one-port network realization......Page 215
11.2.2 Multiple-port network realization......Page 216
11.3 Multi-port non-reciprocal circuit realization......Page 217
11.4 Numerical examples......Page 219
11.5 Summary......Page 223
12.1 Introduction......Page 224
12.2 Problems of subspace projection-based MOR methods......Page 225
12.2.1 Transfer functions and dominant poles......Page 227
12.3 Model order reduction for multiple-terminal circuits: MTermMOR......Page 228
12.3.1 Computation of system poles by subspace-projection methods......Page 229
12.3.2 Symbolic hierarchical analysis for admittance response......Page 230
12.4 Numerical examples......Page 232
12.5 Summary......Page 234
13.1 Introduction......Page 235
13.2 Passivity and positive-realness......Page 237
13.3 Conditional passivity and positive-realness......Page 238
13.4.1 FFT and IFFT based waveform shaping......Page 241
13.4.2 Low-pass-filter based waveform shaping......Page 242
Mitigation of distortion problems......Page 243
13.5 Numerical examples......Page 245
13.6 Summary......Page 246
References......Page 249
Index......Page 258
