High-Linearity CMOS RF Front-End Circuits

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This monograph presents techniques to improve the performance of linear integrated circuits (IC) in CMOS at high frequencies. Those circuits are primarily used in radio-frequency (RF) front-ends of wireless communication systems, such as low noise amplifiers (LNA) and mixers in a receiver and power amplifiers (PA) in a transmitter. A novel linearization technique is presented. With a small trade-off of gain and power consumption this technique can improve the linearity of the majority of circuits by tens of dB. Particularly, for modern CMOS processes, most of which has device matching better than 1%, the distortion can be compressed by up to 40 dB at the output. A prototype LNA has been fabricated in a 0.25um CMOS process, with a measured +18 dBm IIP3. This technique improves the dynamic range of a receiver RF front-end by 12 dB. A new class of power amplifier (parallel class A&B) is also presented to extend the linear operation range and save the DC power consumption. It has been shown by both simulations and measurements that the new PA doubles the maximum output power and reduces the DC power consumption by up to 50%.

Author(s): Yongwang Ding, Ramesh Harjani
Edition: 1
Publisher: Springer
Year: 2004

Language: English
Pages: 132

Contents......Page 6
Dedication......Page 5
List of Figures......Page 9
List of Tables......Page 13
1 Development of radio frequency ICs......Page 14
2.1 Noise......Page 15
2.2 Linearity......Page 17
3 Contributions of this work......Page 19
2.1 Transconductance......Page 21
2.2 Small-signal model......Page 24
2.3 Linearity......Page 25
2.4 Noise......Page 28
3.1 Layout......Page 31
3.2 Simulation......Page 34
3.3 Modeling......Page 35
4 Capacitor......Page 36
4.1 Metal capacitor......Page 37
4.3 Varactor......Page 39
6 Summary......Page 41
1 Differential pair......Page 42
2 Bias offset cross-coupled differential pair......Page 43
3.1 Linear resistor degeneration......Page 44
3.2 Triode-mode transistor degeneration......Page 46
4 Differential pair with a constant sum of V[sub(gs)]......Page 47
4.2 Differential pair with floating voltage source......Page 49
4.3 Differential pair with mobility compensation......Page 50
5 Cross-coupled differential pairs with harmonic cancellation......Page 51
6 Summary......Page 52
1 Linearization in zero-memory weakly nonlinear systems......Page 54
1.1 3[sup(rd)] order harmonic cancellation......Page 56
1.2 Higher order harmonic cancellation......Page 57
2 Linearization in weakly nonlinear systems with memory......Page 58
3 Linearity and power consumption......Page 60
4 Trade off between gain, power consumption and noise......Page 61
4.2 Impact on gain......Page 62
5.1 Harmonic cancellation with input mismatch......Page 63
5.2 Harmonic cancellation with circuit mismatch......Page 64
6 Summary......Page 67
1 Common-gate low noise amplifier......Page 68
1.1 Gain......Page 69
1.2 Noise......Page 71
1.3 Linearity......Page 72
1.4 Common-gate LNA with harmonic cancellation......Page 73
2 Common-source low noise amplifier......Page 74
2.1 Gain......Page 75
2.2 Noise......Page 77
2.4 Common-source LNA with harmonic cancellation......Page 78
2.5 An example of a common-source LNA......Page 79
3 Summary......Page 82
1 Passive mixer......Page 84
1.1 Conversion gain......Page 85
1.3 Linearity......Page 87
2 Gilbert mixer......Page 88
2.1 Conversion gain......Page 89
2.2 Noise......Page 91
3.1 Conversion gain......Page 93
3.2 Improvement of dynamic range......Page 97
3.3 An example of a receiver RF front-end with harmonic cancellation......Page 98
4 Summary......Page 100
7. POWER AMPLIFIER DESIGN IN CMOS......Page 102
1.1 Class A amplifier......Page 103
1.2 Class B amplifier......Page 109
1.3 Class AB amplifier......Page 113
2.1 Improvement of linear range......Page 114
2.2 Power efficiency improvement......Page 118
2.3 An example of parallel class A&B power amplifier......Page 119
3 Summary......Page 122
8. CONCLUSIONS......Page 123
References......Page 125
N......Page 131
Z......Page 132