Circuits insensitive to delays in transistors and wires

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In this paper, we show the possibility of implementing the distributive circuits whose behaviour is insensitive to the delays in transistors and wires, i.e. the circuits with the delays attached to the element inputs.

Author(s): Victor I. Varshavsky
Series: Series B: Technical Reports No. 7
Publisher: Helsinki University of Technology
Year: 1989

Language: English
Pages: 43
Tags: self-timing, speed-independence, delay-insensitivity, Muller circuits, dead-beat (aperiodic) automata, change diagrams